8 Tcl) Jobs

* Identify verification environment requirements from its various sources (Specifications, Design functionality, Interfaces, etc ) * Generate verification test plan, verification environment documentation and test environment usage documentation * Define, develop, and verify complex UVM verification environments * Evaluates and exercises various aspects of the development flow. May include such items as Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modelling, and verification coverage metrics (functional coverage and code coverage) * Collaborate with architect, designers , VIP team to accomplish tasks. * Identify design problems, possible corrective actions and/or inconsistencies on documented functionality * Work with peers to improve methodologies and improve execution efficiency. * Adhere to quality standards and good test and verification practices. * Work as a lead, mentor junior engineers, and help them in debugging complex problems. * Able to Support Customer issues, by their reproduction and analysis. * Should be able multitask between different activities. Key Qualifications * Proven desire to learn and explore new state of the art technologies * Demonstrate good written and spoken English communication skills * Demonstrate good review and problem-solving skills * Knowledgeable with Verilog, VHDL and/or SystemVerilog * Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus * Understanding of verification methodology such as UVM . * Good organization and communication skills * Be a solution provider. * 8+ years of relevant experience

* Identify verification environment requirements from its various sources (Specifications, Design functionality, Interfaces, etc ) * Generate verification test plan, verification environment documentation and test environment usage documentation * Define, develop, and verify complex UVM verification environments * Evaluates and exercises various aspects of the development flow. May include such items as Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modelling, and verification coverage metrics (functional coverage and code coverage) * Collaborate with architect, designers , VIP team to accomplish tasks. * Identify design problems, possible corrective actions and/or inconsistencies on documented functionality * Work with peers to improve methodologies and improve execution efficiency. * Adhere to quality standards and good test and verification practices. * Work as a lead, mentor junior engineers, and help them in debugging complex problems. * Able to Support Customer issues, by their reproduction and analysis. * Should be able multitask between different activities. Key Qualifications * Proven desire to learn and explore new state of the art technologies * Demonstrate good written and spoken English communication skills * Demonstrate good review and problem-solving skills * Knowledgeable with Verilog, VHDL and/or SystemVerilog * Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus * Understanding of verification methodology such as UVM . * Good organization and communication skills * Be a solution provider. * 8+ years of relevant experience

What Youll Need: BS/MS in Electrical Engineering or Computer Science with 4+ years of relevant experience, Hands-on experience with synthesis and place and route (P&R) tools, Proficiency with EDA tools such as DC, ICC2, and Fusion Compiler, Knowledge of advanced placement and routing rules, Experience with scripting languages like Perl and Tcl, Strong understanding of ASIC design flow, VLSI, and CAD development, Never give-up attitude and flexibility in supporting worldwide engagements, Who You Are: Excellent communicator with strong command of English, Highly motivated and self-driven, Detail-oriented with a focus on quality and performance, A team player who thrives in collaborative environments, Adaptable and eager to learn new technologies and methodologies,

What Youll Need: BS/MS in Electrical Engineering or Computer Science with 4+ years of relevant experience, Hands-on experience with synthesis and place and route (P&R) tools, Proficiency with EDA tools such as DC, ICC2, and Fusion Compiler, Knowledge of advanced placement and routing rules, Experience with scripting languages like Perl and Tcl, Strong understanding of ASIC design flow, VLSI, and CAD development, Never give-up attitude and flexibility in supporting worldwide engagements, Who You Are: Excellent communicator with strong command of English, Highly motivated and self-driven, Detail-oriented with a focus on quality and performance, A team player who thrives in collaborative environments, Adaptable and eager to learn new technologies and methodologies,

You Are: You are a skilled Emulation R&D Engineer with over 8 years of experience and a strong academic background in Electronic & Communication or Computer Science Engineering. Your expertise in C/C++, OOPS, and HDL languages like System Verilog and Verilog, along with your scripting skills in Perl or TCL, make you a valuable team member. You possess knowledge of protocols such as ENET, HDMI, MIPI, AMBA, and UART, and have experience with UVM and Functional Verification. You are a resourceful problem-solver, a team player, and have excellent communication skills. What You ll Be Doing: Designing and developing emulation models. Implementing and verifying digital designs using System Verilog and Verilog. Developing scripts in Perl, TCL, or other languages. Collaborating with cross-functional teams. Conducting protocol verification for various standards. Utilizing UVM for design validation. The Impact You Will Have: Enhancing emulation model efficiency. Contributing to high-performance silicon chips. Improving design reliability through verification. Streamlining workflows with automation. Ensuring protocol compliance. Driving technological advancements. What You ll Need: B.E / M.E. in Electronic & Communication / Computer Science Engineering. Proficiency in C/C++ and OOPS. Knowledge of digital design and HDL languages. Experience with scripting languages. Familiarity with multiple protocols likeethernet, pcie, cxl, CSI, DSI, UFS AMBA, CHIand UVM. Who You Are: Effective communicator. Team player. Resourceful and detail-oriented. Innovative problem-solver. Adaptable learner.

You Are: You are a skilled Emulation R&D Engineer with over 8 years of experience and a strong academic background in Electronic & Communication or Computer Science Engineering. Your expertise in C/C++, OOPS, and HDL languages like System Verilog and Verilog, along with your scripting skills in Perl or TCL, make you a valuable team member. You possess knowledge of protocols such as ENET, HDMI, MIPI, AMBA, and UART, and have experience with UVM and Functional Verification. You are a resourceful problem-solver, a team player, and have excellent communication skills. What You ll Be Doing: Designing and developing emulation models. Implementing and verifying digital designs using System Verilog and Verilog. Developing scripts in Perl, TCL, or other languages. Collaborating with cross-functional teams. Conducting protocol verification for various standards. Utilizing UVM for design validation. The Impact You Will Have: Enhancing emulation model efficiency. Contributing to high-performance silicon chips. Improving design reliability through verification. Streamlining workflows with automation. Ensuring protocol compliance. Driving technological advancements. What You ll Need: B.E / M.E. in Electronic & Communication / Computer Science Engineering. Proficiency in C/C++ and OOPS. Knowledge of digital design and HDL languages. Experience with scripting languages. Familiarity with multiple protocols likeethernet, pcie, cxl, CSI, DSI, UFS AMBA, CHIand UVM. Who You Are: Effective communicator. Team player. Resourceful and detail-oriented. Innovative problem-solver. Adaptable learner.

You Are: You are a skilled Emulation R&D Engineer with over 8 years of experience and a strong academic background in Electronic & Communication or Computer Science Engineering. Your expertise in C/C++, OOPS, and HDL languages like System Verilog and Verilog, along with your scripting skills in Perl or TCL, make you a valuable team member. You possess knowledge of protocols such as ENET, HDMI, MIPI, AMBA, and UART, and have experience with UVM and Functional Verification. You are a resourceful problem-solver, a team player, and have excellent communication skills. What You ll Be Doing: Designing and developing emulation models. Implementing and verifying digital designs using System Verilog and Verilog. Developing scripts in Perl, TCL, or other languages. Collaborating with cross-functional teams. Conducting protocol verification for various standards. Utilizing UVM for design validation. The Impact You Will Have: Enhancing emulation model efficiency. Contributing to high-performance silicon chips. Improving design reliability through verification. Streamlining workflows with automation. Ensuring protocol compliance. Driving technological advancements. What You ll Need: B.E / M.E. in Electronic & Communication / Computer Science Engineering. Proficiency in C/C++ and OOPS. Knowledge of digital design and HDL languages. Experience with scripting languages. Familiarity with multiple protocols likeethernet, pcie, cxl, CSI, DSI, UFS AMBA, CHIand UVM. Who You Are: Effective communicator. Team player. Resourceful and detail-oriented. Innovative problem-solver. Adaptable learner.

What You ll Be Doing: Implementing state-of-the-art Verification environments for the DesignWare family of synthesizable cores. Performing Verification tasks for IP cores, focusing on domains such as USB, PCI Express, Ethernet, and AMBA. Collaborating closely with the RTL design team and other expert Verification Engineers globally. Engaging in Test planning, Test environment coding at both unit and system levels, Test case coding, and debugging. Coding and analyzing functional coverage and meeting quality metric goals. Managing regression processes to ensure comprehensive verification. The Impact You Will Have: Enhancing the robustness and reliability of our IP cores, ensuring high-quality deliverables. Contributing to the development of innovative solutions that drive the Era of Smart Everything. Reducing the time-to-market for our customers by ensuring their products meet performance, power, and size requirements. Supporting the integration of more capabilities into SoCs, enabling differentiated products. Participating in a global team effort to advance cutting-edge technologies in chip design and software security. Ensuring the successful verification of complex IP cores, contributing to the overall success and reputation of Synopsys. What You ll Need: BS/BE in Electrical Engineering with 5+ years of relevant experience or MS with 3+ years of relevant experience in IP core and/or SOC verification. Proficiency in developing HVL-based test environments and implementing test plans. Hands-on experience with industry-standard simulators such as VCS, NC, and MTI, and relevant debugging tools. Strong understanding of verification methodologies like UVM/VMM/OVM. Familiarity with Verilog and scripting languages such as Perl. Basic understanding of functional and code coverage. Excellent written and oral communication skills, along with strong analytical, debugging, and problem-solving abilities. Who You Are: A self-driven individual with a passion for technology and innovation. A collaborative team player with the ability to work effectively in a global team environment. A detail-oriented professional with a commitment to delivering high-quality work. A proactive learner who stays updated with the latest industry trends and technologies.