3 Sva Jobs

Own and develop UVM-based testbench environments for IP/SoC verification Design verification architecture, testplans, and SVA based on protocol specifications (PCIe, CXL, UCIe, AXI, etc.) Drive all aspects of the verification lifecycle including testbench creation, coverage closure, and debugging Collaborate with RTL design teams to resolve issues and close functional coverage Conduct peer reviews to maintain high testbench code quality Contribute technical papers and patent ideas on testbench innovations and verification methodologies Work closely with global teams and ensure timely project execution The Impact You Will Have: Deliver reliable and robust verification solutions that ensure high-quality IP/SoC design Influence UVM testbench architecture through innovation and best practices Improve efficiency and accuracy in verification through SVA and advanced debugging Enable faster time-to-market by streamlining simulation and debug processes Contribute to Synopsys IP leadership by ensuring verification excellence across global projects What You'll Need: 48 years of experience in UVM-based verification for IP/SoC Strong SystemVerilog knowledge and protocol understanding (PCIe, CXL, UCIe, AXI, etc.) Hands-on experience with functional coverage closure and SystemVerilog Assertions (SVA) Proficiency in simulation tools and waveform debug tools like DVE/Verdi Familiarity with version control tools (e.g., Perforce) Scripting knowledge (Python, TCL) is an added advantage Strong communication, problem-solving skills, and ability to work across teams and geographies

BS or MS degree in Computer Science, Electrical or Electronics Engineering, or Related Field with 8+ years of experience in the following areas: Own UVM based testbench environment and developed UVM testbench architecture, Testplan and SVA for an IP Knowledge of one or more of protocols/standards: PCIe, CXL, UCIe, AMBA (AXI, APB, AHB) etc Good knowledge of System Verilog Hands-on experience with coverage closure and writing SVA for IP/SOC Good simulation debugging skills Experience with Perforce or similar revision control environment Experience with Python/TCL or any scripting knowledge is an added advantage Job Responsibilities include - Understand Standard Specifications, create testplan for the product and create UVM based testbench architecture. Propose and enhance the UVM architecture with unique idea for verification Be single point of contact with hands-on experience on all verification tasks Testbench Creation Testplan creation Coverage closure SVA Release Perform peer review of testbench code for continuous quality Own simulation debugs using DVE/Verdi, interact with Design Team and aid in debug and Verification closure The candidate will work in a project and team-oriented environment with teams spread across multiple sites, worldwide Lead team of engineers to perform various verification activities on IPs/Subsystems Anticipate problems and risks and work towards a resolution and risk mitigation plan Assist and mentor the team in day-to-day activities and grow the capabilities of verification team for future assignments Review various results and reports to provide continuous feedback to the team and improve quality of deliverables Report status to management and provide suggestions to resolve any issues that may impact execution The candidate must have excellent oratory and written communication skills in English, should be a team player and possess good problem-solving skills and show high levels of initiative

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are an experienced and motivated professional with a passion for solving challenging technical problems in the verification domain You are open to continuous learning and thrive on working with cutting-edge technologies You possess excellent communication skills and enjoy collaborating with domain experts across global locations You have a strong foundation in digital design, HDLs, and System Verilog, and you are proficient in using verification technologies Your attention to detail and innovative mindset make you a valuable team player who partners effectively with multiple stakeholders You are self-organized, motivated, and capable of multitasking in a dynamic environment, What Youll Be Doing: Working on challenging technical problems in the verification domain under the Synopsys Verification Platform, Engaging with HDL/HVL methodologies and dynamic simulation aspects, including debugging, Collaborating with global teams to propose and implement solutions, Utilizing your knowledge of UNIX, Tcl, and other scripting languages to enhance productivity, Participating in continuous learning and staying updated with the latest verification technologies, Contributing to a diverse environment and interacting with domain experts across various locations, The Impact You Will Have: Accelerating the design and verification of high-performance silicon chips, Enhancing the usability and adoption of Synopsys verification products and solutions, Optimizing chip designs for power, cost, and performance, thereby reducing project schedules, Driving technological innovation and contributing to the development of next-generation processes and models, Fostering collaboration and knowledge sharing within a global team, Supporting the creation of advanced technologies that power self-driving cars, AI, the cloud, 5G, and IoT, What Youll Need: Bachelors degree in Electronics with 3+ yearsexperience or a Masters degree in Electronics with 2+ yearsexperience, Proficiency in verification technologies such as Simulation, UVM, SVA, and LRM, Experience with Synopsys EDA tools (e-g, VCS, Verdi) is an advantage, Strong fundamentals in digital design, HDLs (Verilog/VHDL), and System Verilog, Excellent written and oral communication skills for effective global team interactions, Who You Are: A team player with a collaborative mindset and the ability to work with multiple stakeholders, A detail-oriented and innovative thinker who can propose effective solutions, Motivated, proactive, and self-organized with good social communication skills, Open to travel and capable of multitasking in a dynamic environment, The Team Youll Be A Part Of: You will be part of our Silicon Design & Verification business unit, which focuses on building high-performance silicon chips faster We are the leading provider of solutions for designing and verifying advanced silicon chips, and we develop next-generation processes and models to manufacture these chips Our team is dedicated to optimizing chips for power, cost, and performance, and we work collaboratively with global experts to drive innovation, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,