• Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
• Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
• Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyse power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the pre silicon environment. Finds and implements corrective measures to resolve failing tests.
• Collaborates and communicates with SoC architects, micro architects, full chip architects, RTL developers, post silicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from post silicon on the quality of validation done during pre silicon development, updates test plan for missing coverages, and proliferates to future products.

Qualifications

• Minimum 7 to 10 year of relevant experience in SoC emulation validation i.e. developing verification components integrating IP verification content to SOC preparing and executing test plan for complex clusters, subsystems for emulation platform.
• Good understanding and working experience in HVL System Verilog HDL, Verilog, C or C++ and scripts Perl shell Knowledge, experience in Industry standard emulation and debugging tools i.e. Zebu and/or palladium etc. .
• Good understanding of SoC Fabric [CXL mainly, cache coherency), Multimedia (Graphics, Media, Display, IPU), D2D/UCIE and Power Management clusters.
• Excellent debugging and analytical abilities.
• Qualifications BE or B Tech or M Tech ECE or Computer Science with 6-10 years emulation model bring-up and emulation verification experience at SoC level.