Soc Power Architecture - Power Artist/PTPX

We are looking for an experienced engineer to join the SOC Power Modeling team in the AMD Client Computing and Graphics group. This role involves collaboration with multiple engineering teams including SoC architecture definition, IP design, integration/physical design, verification, and platform architecture. Contributions have a direct impact on the power & performance of AMD’s Client products.

• Work with front end RTL, DFT, Synthesis, and Physical design teams in the development of power intent (UPF) design at SoC level.
• Work with emulation team on power estimates during the pre-silicon design process using Power Artist/PTPX emulation environments and ensure power objectives and goals are met.
• Work with RTL and physical design teams to generate data on design impact from clock and power gating, device type mix and physical implementation options.
• Track IP power development through the design cycle ensuring it meets power budgets - leakage/dynamic at every milestone.
• Work with design verification in validating low power design features at SoC and IP level.

• Experience with Synopsys EDA tools, particularly PtPx/Power Artist.
• Understanding of hardware emulation process, stimulus and EDA flows.
• Experience with Tcl and Python based scripting.
• Experience with UPF.

• Master or Bachelor of Science degree in Electrical Engineering.
• 3+ years of experience.

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