10 Noise Analysis Jobs

What You'll Be Doing: Analyze various analog circuit techniques for dynamic and static power reduction, performance enhancement, and area reduction. Develop Analog Full custom circuit macros, including Transmitters, Receivers, Clocking circuits, equalizers, serializers, de-serializers, and Analog Front End needed for High-Speed PHY IP. Leverage your understanding of circuit design and layout, along with knowledge of bipolar, CMOS, passive structure, and interconnect failure modes. Collaborate with experienced teams locally and globally to deliver high-performance silicon chips. Create simulation environments to verify circuit specifications and debug circuits as needed. Optimize layouts and parasitics to enhance circuit performance and reliability. The Impact You Will Have: Contribute to the design and verification of advanced silicon chips, accelerating their development and manufacturing processes. Enable customers to optimize their chips for power, cost, and performance, significantly reducing project schedules. Drive innovations in high-speed physical interfaces, enhancing the performance and reliability of our products. Collaborate with global teams to leverage diverse expertise and deliver cutting-edge technology solutions. Influence the development of next-generation processes and models for manufacturing high-performance silicon chips. Ensure the successful implementation of analog and mixed-signal circuit designs in advanced CMOS technologies. What You'll Need: BE with 5+ years of relevant experience or MTech with 4+ years of relevant experience in Electrical/Electronics/VLSI Engineering or a related field. Strong fundamentals in CMOS circuit design, device physics, and sub-micron design methodologies. Experience with analog transistor-level circuit design in nanometer technologies. Familiarity with Multi Gbps range high-speed designs, including PAM4 serdes architectures. Proficiency in creating simulation environments and debugging circuits. Who You Are: Detail-oriented with excellent problem-solving skills. Strong communicator, capable of collaborating with teams across different locations. Innovative thinker with a passion for technology and circuit design. Proactive and self-motivated, with the ability to work independently and as part of a team. Adaptable and open to learning new techniques and methodologies.

What You'll Be Doing: * Designing and developing DDR I/O circuits to meet performance and power specifications. * Collaborating with cross-functional teams to integrate analog circuitry into SoCs. * Executing circuit design tasks with a focus on product quality and efficiency. * Conducting layout reviews and ensuring adherence to design methodologies. * Participating in design reviews and providing technical insights. * Staying updated with the latest advancements in CMOS processes and deep submicron technologies. The Impact You Will Have: * Enhancing the performance and efficiency of our silicon IP portfolio. * Contributing to the rapid integration of advanced capabilities into SoCs. * Reducing the time-to-market and risk for our customers products. * Driving innovation in analog design and setting new industry standards. * Strengthening Synopsys position as a leader in chip design and verification. * Empowering the development of high-performance, differentiated products. What You'll Need: * BTech/MTech in Electrical Engineering or a related field. * 4+ years of experience in CMOS circuit design and layout methodology. * Strong knowledge of deep submicron process technologies. * Familiarity with ASIC design flow and JEDEC standards for DDR interfaces. * Excellent written and verbal communication skills. Who You Are: * A collaborative team player with a proactive approach. * Detail-oriented with a commitment to quality and efficiency. * Innovative and adaptable, always seeking to learn and grow. * Effective communicator, able to convey technical information clearly.

What You'll Be Doing: Ensure analog sub-block performance adheres to SerDes standards and architecture document specifications. Identify and refine circuit implementations to achieve optimal power, area, and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure highest quality design. Oversee physical layout to minimize the effect of parasitic, device stress, and process variation. Present simulation data for peer review. Ownership of analog and mixed-signal building block that is integrated as part of a larger SerDes design. Document design features and test plans. Consult on the electrical characterization of your circuit within the SerDes IP product. The Impact You Will Have: Contribute to the development of cutting-edge SerDes technologies that drive high-performance computing and communication systems. Enhance the overall performance and efficiency of our analog and mixed-signal designs, ensuring they meet industry standards. Improve the quality and reliability of our designs through meticulous verification and layout oversight. Support the seamless integration of analog and mixed-signal building blocks within larger SerDes designs. Drive innovation by identifying and implementing optimal circuit solutions for complex design challenges. Collaborate with cross-functional teams to deliver high-quality IP products that meet customer requirements. What You'll Need: BTech or MS with 2+ years of SerDes/High-Speed analog design experience. Familiarity with transistor-level circuit design of fundamental analog and mixed-signal building blocks. Sound CMOS design fundamentals. Design experience with some of the following SerDes sub-circuits: equalizers, data samplers, voltage/current-mode drivers, serializers, LDOs, Bandgap, ADC/DAC, PLLs, DLLs. Who You Are: Detail-oriented and meticulous in your approach to design and verification. A strong communicator, able to present complex technical data clearly and concisely. Collaborative and team-oriented, thriving in a peer-review environment. Innovative and solution-focused, always seeking to optimize design performance. Proactive and self-motivated, with a passion for continuous learning and improvement.

An Analog Design engineer works on conceptualizing, designing and productizing state of the art analog sensors. We are seeking an experienced, highly motivated, and high-caliber individual to work on design of on-chip Process, Voltage, Temperature, Current and Droop sensors as part of PVT sensor group. This individual should have strong technical experience in full custom analog/mixed-signal circuit design, circuit simulations, custom layout and post-silicon characterization. Additional responsibilities include: Development of new solutions in the field of on-die monitoring Liaising with layout team to achieve best possible engineering solution Deployment of new sensors into test chips and post-silicon characterization Guiding more junior engineers and tracking their work Job Requirements Design oriented and forward-looking thought process Sound knowledge of custom Analog/AMS design techniques, implementation and verification B.Tech. or M.Tech. degree in Electrical Engineering with 5+ years of relevant industry experience or Phd with relevant experience. Awareness of full custom layout techniques Exposure to advanced process challenges, including ESD and Reliability Exposure to architecture, design and verification of PVT, Oscillators, Bandgap, PLLs, LDOs, ADCs, Amplifiers, PHYs and other Mixed-signal blocks Excellent teamwork, communication, mentoring, and interpersonal skills with both internal teams and external customers Preferred skills : Strong custom design experience specification, circuit design description and schematics Hands on experience with circuit design & simulation tools, IC design CAD packages from any EDA vendor Strong understanding of SPICE simulator concepts and simulation methods Familiar with circuit simulation tools like PrimeSim, FineSim, HSPICE or similar Must have prior experience with Custom Compiler or equivalent schematic & Layout editor tools Experience with statistical design methodology like generating and analyzing Monte-Carlo results Awareness of post-layout extraction & simulation, testing in conjunction with silicon validation Demonstrated technical expertise in the productization of advanced technologies

What You'll Be Doing: Conceptualizing and designing state-of-the-art analog sensors for on-chip Process, Voltage, Temperature, Current, and Droop monitoring. Collaborating with the layout team to achieve optimal engineering solutions. Deploying new sensors into test chips and conducting post-silicon characterization. Guiding and mentoring junior engineers, tracking their work, and ensuring project milestones are met. Developing new solutions in the field of on-die monitoring. Participating in the architecture, design, and verification of various mixed-signal blocks such as PVT sensors, oscillators, bandgaps, PLLs, LDOs, ADCs, amplifiers, and PHYs. The Impact You Will Have: Contributing to the development of cutting-edge technology that powers the Era of Smart Everything. Ensuring the reliability and performance of advanced analog and mixed-signal circuits. Driving innovation in on-chip monitoring solutions, enhancing the functionality and efficiency of our products. Mentoring and developing the next generation of engineers, fostering a culture of excellence and continuous improvement. Collaborating with cross-functional teams to deliver high-quality products that meet customer needs. Enhancing Synopsys reputation as a leader in chip design and verification through your technical contributions and thought leadership. What You'll Need: B.Tech. or M.Tech. degree in Electrical Engineering with 10+ years of relevant industry experience, or a PhD with equivalent experience. Strong technical experience in full custom analog/mixed-signal circuit design, circuit simulations, custom layout, and post-silicon characterization. Sound knowledge of custom Analog/AMS design techniques, implementation, and verification. Hands-on experience with circuit design and simulation tools, IC design CAD packages from any EDA vendor. Strong understanding of SPICE simulator concepts and simulation methods.

What You'll Be Doing: Developing new solutions in the field of on-die monitoring Liaising with the layout team to achieve the best possible engineering solutions Deploying new sensors into test chips and conducting post-silicon characterization Guiding junior engineers and tracking their work Conceptualizing, designing, and productizing state-of-the-art analog sensors Engaging in full custom analog/mixed-signal circuit design, simulations, and custom layout The Impact You Will Have: Driving innovation in on-die monitoring solutions Ensuring the highest quality engineering solutions through close collaboration with the layout team Advancing the deployment and characterization of new sensor technologies Mentoring and developing the next generation of engineers Contributing to the design and productization of cutting-edge analog sensors Enhancing the overall performance and reliability of our products What You'll Need: B.Tech. or M.Tech. degree in Electrical Engineering with 10+ years of relevant industry experience or a Ph.D. with relevant experience Strong technical experience in custom Analog/AMS design techniques, implementation, and verification Knowledge of full custom layout techniques Experience with circuit design and simulation tools, IC design CAD packages from any EDA vendor Understanding of SPICE simulator concepts and simulation methods

What You'll Be Doing: Review SerDes standards to develop novel transceiver architectures and sub-block specifications. Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets. Work across project and department teams to streamline design and verification strategies ensuring overall design quality, efficiency, and performance. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present and review simulation data from internal project teams; present results externally at industry panels or customer reviews. Document design features and test plans; consult on the overall electrical characterization of the SerDes IP product. Analyze customer silicon data for design enhancements and propose solutions for post-silicon design updates. The Impact You Will Have: Contribute to the development of cutting-edge Multi-Gbps NRZ & PAM4 SERDES IP, shaping the future of high-speed communication technology. Drive revolutionary improvements in power, area, and performance, enhancing the overall efficiency and effectiveness of our designs. Streamline design and verification strategies across teams, fostering a collaborative and innovative work environment. Ensure high-quality design and performance through meticulous oversight of physical layouts and awareness of design for reliability and signal integrity issues. Enhance customer satisfaction by analyzing silicon data and proposing effective design updates. Represent Synopsys at industry panels and customer reviews, showcasing our commitment to excellence and innovation. What You'll Need: MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical Engineering, Computer Engineering, or a related field. Experience with FinFET technologies and a strong understanding of transistor-level circuit design and CMOS fundamentals. Extensive design experience with high-speed designs, including PAM4 SerDes architectures and various SerDes sub-circuits. Familiarity with tools for schematic entry, physical layout, design verification, and SPICE simulators. Exposure to scripting for post-processing of simulation results (e.g., TCL, PERL, MATLAB).

What You'll Be Doing: Review SerDes standards to develop novel transceiver architectures and sub-block specifications. Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets. Work across project and department teams to streamline design and verification strategies ensuring overall design quality, efficiency, and performance. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present and review simulation data from internal project teams; present results externally at industry panels or customer reviews. Document design features and test plans; consult on the overall electrical characterization of the SerDes IP product. Analyze customer silicon data for design enhancements and propose solutions for post-silicon design updates. The Impact You Will Have: Contribute to the development of cutting-edge Multi-Gbps NRZ & PAM4 SERDES IP, shaping the future of high-speed communication technology. Drive revolutionary improvements in power, area, and performance, enhancing the overall efficiency and effectiveness of our designs. Streamline design and verification strategies across teams, fostering a collaborative and innovative work environment. Ensure high-quality design and performance through meticulous oversight of physical layouts and awareness of design for reliability and signal integrity issues. Enhance customer satisfaction by analyzing silicon data and proposing effective design updates. Represent Synopsys at industry panels and customer reviews, showcasing our commitment to excellence and innovation. What You'll Need: MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical Engineering, Computer Engineering, or a related field. Experience with FinFET technologies and a strong understanding of transistor-level circuit design and CMOS fundamentals. Extensive design experience with high-speed designs, including PAM4 SerDes architectures and various SerDes sub-circuits. Familiarity with tools for schematic entry, physical layout, design verification, and SPICE simulators. Exposure to scripting for post-processing of simulation results (e.g., TCL, PERL, MATLAB).

What You'll Be Doing: Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuitsin PLL and other IP Create and optimize layout designs using industry-standard EDA tools. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Define, design and develop complex RFclock path Participate in design reviews and provide feedback to improve design quality. Work closely with circuit designers to understand design specifications and constraints. Contribute to the development and enhancement of layout design methodologies and best practices. Stay updated with the latest industry trends and advancements in A&MS layout design. The Impact You Will Have: Ensure the highest quality and performance of our analog and mixed-signal integrated circuits. Drive innovation by developing cutting-edge layout designs that push the boundaries of technology. Enhance the manufacturability and reliability of our products through meticulous design and verification processes. Contribute to the overall success of our projects by providing valuable feedback during design reviews. Improve design methodologies and best practices, fostering a culture of continuous improvement. Support the growth and development of junior engineers by sharing your expertise and knowledge. What You'll Need: Bachelor's or Master's degree in Electrical Engineering or a related field. 7+ years of experience in A&MS layout design for integrated circuits. Handsphysical design experienceofpassive elementsused in PLLRC filter,LCoscillator Basic knowledge ofPLLoperatingblocks Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Understanding of semiconductor process technologies and their impact on layout design. Excellent problem-solving and systematic skills. Ability to work effectively in a team-oriented env Who You Are: Innovative thinker with a passion for technology and problem-solving. Excellent communicator, capable of articulating complex concepts clearly. Detail-oriented with a strong focus on quality and precision. Collaborative team player who thrives in a dynamic work environment. Adaptable and able to manage multiple priorities effectively.

Introduction Physical design team is responsible for designing high performance microprocessor blocks for IBM Power and z mainframe servers. Your role and responsibilities . Responsible for high performance microprocessor blocks RTL to GDSII implementation . Perform block level synthesis, floor-planning, placement and routing. . Close the design to meet timing, power budget and area. . Implement ECOs to address functional bugs and timing violations. . Team player, with good problem solving and communication skills. Required education Bachelors Degree Preferred education Masters Degree Required technical and professional expertise 5-8 years industry experience in physical design methodology. Good knowledge andhands on experience in physical design methodology which include logic synthesis,placement, clock tree synthesis, routing . Should be knowledgeable in physical verification ( LVS,DRC.. etc), Noise analysis, Power analysis and electro migration . Team player with good problem solving skills, communication skills and leadership skills. Preferred technical and professional experience Automation skills in PYTHON, PERL ,SKILL and/or TCL