Name: Jobpe
Address: T-Hub, Plot No 1/C, Sy No 83/1, Raidurgam panmaktha, Knowledge City Rd, Hyderabad, Telangana, 500081, IN
Telephone: +91-83339-09630
Price range: Free

MTS Silicon Design Engineer AMD

5.0 - 8.0 years

4 - 8 Lacs

Bengaluru, Karnataka, India

On-site

THE ROLE: This job opening is for a circuit designer in a team responsible for high-precision custom circuit blocks in AMD's microprocessor designs. This team owns a wide variety of key IP in Digital and Analog/Mixed-Signal domains catering to products across multiple business units. With a good mix of experienced designers and recent college graduates from top Engineering institutions across the country, this team offers a very competitive atmosphere with excellent scope to learn and improve. Meticulous execution routine resulting in a solid track record, a strong focus on innovation and a balanced work-life distribution makes this one of the top-class teams in this space across the industry. THE PERSON: Ideal candidate would be the one with not only strong circuit design knowledge, but also clear communication and presentation skills along with diligent documentation of work. Passion to go beyond the call of duty and innovate for higher efficiency would be a key differentiator. KEY RESPONSIBILITIES: Complete ownership of analog mixed-signal circuit blocks in CPU/GPU designs in cutting edge FinFet technology nodes Responsible for circuit design, layout quality, electrical and timing analysis, and reliability checks Interface with cross-functional teams like RTL, Verification and Physical Design PREFERRED EXPERIENCE: Strong hands-on experience in relevent analog circuits including LDO, Bandgap, ADC, DAC, PLL, etc. in latest technology nodes, including Finfet Knowledge of Ultra-Fast Transient Regulators, On-Chip Power Distribution and PDN Modeling Good technical knowledge of power-performance trade-offs in the designs Direct experience in all phases of design analysis including functional, static timing and electrical sign-off ACADEMIC CREDENTIALS: Desired: Masters in Electrical/Electronics Engineering, with specialization in microelectronics or something similar

Posted 5 days ago

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Analog Mixed Signal Design-Staff Engineer Cyient

5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

The ideal candidate should possess experience in Analog and Mixed Signal Design, focusing on PMIC blocks such as DC-DC converter (BUCK, BOOST), LDOs, and clocking circuits. A strong foundation in CMOS design and active filter design is essential for this role. Responsibilities will include circuit design, validation, mixed signal validation, and reliability validation. Exposure to PMIC designs, high-speed digital circuit design, and analysis with timing and flow closure is required. Additionally, knowledge of digitally assisted analog circuits and techniques is preferred. The candidate will be entrusted with developing high-speed, low-power, and reliable analog and digital circuits for various PLL areas. Proficiency in control systems, Bandgap reference, bias, op-amps, feedback, and compensation techniques is necessary. Joining an expanding analog/mixed-signal circuit design team involved in cutting-edge foundry process development nodes, the selected candidate will be expected to focus on Analog blocks and clocking circuits. Proficiency in CMOS design, passive RC circuits, and switched-cap circuits is crucial for success in this role. Task responsibilities will encompass circuit design, validation, mixed signal validation, and reliability validation. Additionally, the candidate should be adept in high-speed digital circuit design and analysis with timing and flow closure, as well as digitally assisted analog circuit and techniques. The role will involve the development of high-speed, low-power, and reliable analog and digital circuits for various PLL areas, requiring a good understanding of control systems, band gaps, bias, op-amps, LDOs, feedback, compensation techniques, as well as experience in LC VCO/DCO design. Exposure to VCO performance parameters and complete PLL architecture is highly desirable.,

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Ams Layout Design Engineer SOP Technology Services

5.0 - 10.0 years

25 - 40 Lacs

Pune, Ahmedabad, Chennai

Work from Office

Job Title: AMS Layout Design Engineer Job Description 90/130/150nm and higher node with PMIC layout experience. Performs layout and takes corrective actions in such a way that the final result meets all requirements as stated in the Design document, section layout, including all remarks from review, the customer and back annotation. Performs layout in such a way that the final result meets all general layout guidelines and matches 1-to-1 with parameter devices and hierarchy used in simulations. Create floorplan Performs DRC and takes corrective actions if needed until DRC is error free Performs LVS and takes corrective actions if needed until result is successful Performs layout in such a way that final result meets the foundry layout rules. Provides extracted netlist for back annotation to DE as specified in the Design document, section layout. Translates sub block schematics to sub block layouts, taking care of the same hierarchical build-up and respecting the guidelines of the Block review document, section layout. Adds extra useful information to the Block review document, section layout.

Posted 3 weeks ago

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Analog Circuit Design Lead Wipro

7.0 - 10.0 years

20 - 35 Lacs

Bengaluru

Hybrid

Requirement : Analog Circuit Design Lead Experience Range : 7 - 12 Yrs. Work Location(s) : Bengaluru, Karnataka Candidates who are ready to join Immediately Requirements: Experience in entire Analog IP development including circuit design, layout, AMS verification, and characterization. Must have led the entire Analog IP development cycle and team. Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs, Oscillators, General Purpose IOs, Temperature sensor, SERDES, PHYs, Die to Die interconnect, High-speed IOs, etc. Analog/custom layout design in advanced CMOS process. Ability to understand design constraints and implement high-quality layouts. Conceptualize and implement chip-level mixed signal simulation environments (testbenches, run scripts, etc...). Characterization . Hands-on experience on lower FINFET technology nodes and design/PPA trade-offs

Posted 2 months ago

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