Posted:4 weeks ago|
Platform:
Work from Office
Full Time
Position: Design Verification Engineer Location: Bangalore Experience: 5+ Years Key Skills Required: Strong experience in CXL or PCIe Protocol Verification Proficiency in UVM, SystemVerilog, Verilog Hands-on experience with simulation tools (VCS, ModelSim, Questa, etc.) Excellent debugging and problem-solving skills Good to Have: Exposure to AMBA protocols (AXI, AHB, APB) Knowledge of scripting languages like Python or Perl Educational Qualification: Bachelor s or Master s degree in Electronics Engineering , Electrical Engineering , or related field
ibis Hotel
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