Emulation Engineer(3 to 7 years) SpanIdea Systems

3.0 - 7.0 years

0 Lacs

hyderabad, telangana

On-site

As an ideal candidate for this role, you should possess 3-5 years of experience in emulation/prototyping utilizing Cadence tool flows such as Palladium and Protium. Your expertise should extend to having a working knowledge of System Verilog and Verilog language semantics, along with familiarity with compilation flows associated with these languages. A solid understanding of SOC architecture and the AXI protocol is essential for this position. Your ability to comprehend and work effectively with SOC architectures and AXI protocol will be crucial to your success in this role. Moreover, strong communication skills and the capacity for effective team collaboration are highly valued. Your ability to communicate effectively and collaborate efficiently with team members will contribute significantly to the overall success of the projects you will be involved in.,

Posted 1 week ago

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