Logic Design Engineer

8 - 13 years

3 - 7 Lacs

Posted:18 hours ago| Platform: Naukri logo

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Job Description


As a Senior Logic Design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLLAdditional responsibilities:logic (RTL) design, timing closure, CDC analysis etc.Understand and Design Power efficient logic.Agile project planning and execution.RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Master's Degree Preferred education Bachelor's Degree Required technical and professional expertise Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance.Minimum 8+ years of experience in Chip design and development.Understand CPU / GPU / RISC V architectures.Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO )Understand RISC V coreExperience with VLSI Design in VHDL / Verilog Preferred technical and professional experience s a Hardware Engineer at IBM ISDL , you’ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today’s market.11:53 Required Professional and Technical Expertise: 
Minimum 8+ years of experience in Chip design and development.Understand CPU / GPU / RISC V architectures.Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO )Understand RISC V coreExperience with VLSI Design in VHDL / Verilog

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Information Technology

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