About the Company:
Founded with the vision of building a runtime reconfigurable, future-proof processor, Morphing Machines is a fabless semiconductor company working on a ground-breaking technology that will transform the chip design landscape. Morphing Machines patent protected IP, REDEFINE, can concurrently accelerate heterogenous workloads, on a homogenous fabric of processing cores. REDEFINE combines ASIC (Application Specific Integrated Circuit) like performance with the reconfigurability of FPGAs (Field Programmable Gate Arrays). Morphing Machines innovation enables dataflow compute, which is a paradigm shift in the current processor industry. Due to the nature of our architecture, we can cater across domains from Data Centers, Quantitative Finance, AI/ML acceleration, Edge Vision to High Performance Compute (HPC) applications, all with the same hardware fabric. At Morphing Machines, we are building a cutting-edge technology guided by our vision to build truly software-defined hardware.
Job Overview:
As the Senior Compiler Engineer, you will be responsible for leading the development of a compiler toolchain for the REDEFINE accelerator, including an MLIR-based graph compiler for AI-ML frameworks. You will work closely with cross-functional teams, including hardware engineers, software developers, and system architects, to ensure the seamless integration of the REDEFINE accelerator with the software ecosystem. Your expertise in compiler development, programming languages, and AI-ML frameworks will be essential in building a powerful and developer-friendly software toolchain.
Requirements:
- Graph Compiler Development:
- Lead the development of a graph compiler for AI-ML applications, enabling efficient execution of complex neural network models on the REDEFINE accelerator.
- Design and implement compiler optimizations, code transformations, and scheduling techniques to maximize performance and resource utilization.
- Collaborate with the hardware and system architecture teams to understand accelerator capabilities and optimize the compiler for specific hardware features.
- Software Toolchain Development:
- Contribute to the overall development of the software toolchain for the REDEFINE accelerator, including compilers, runtime environments, and libraries.
- Collaborate with the system software and runtime teams to optimize the interaction between the compiler and runtime components.
- Ensure developer-friendly features like debugging support, profiling, and performance analysis tools.
- Performance Analysis and Optimization:
- Conduct performance analysis and optimization of the compiler, graph compiler, and intermediate abstraction layer.
- Collaborate with the hardware and system teams to identify opportunities for performance improvements and software-hardware co-optimizations.
- Stay updated with the latest advancements in compiler techniques, programming languages, and AI-ML frameworks to drive continuous improvement.
- Collaboration and Documentation:
- Collaborate closely with hardware, software, and system teams to ensure seamless integration and compatibility.
- Document design decisions, algorithms, and optimizations to facilitate knowledge sharing and future development.
- Provide technical guidance and mentorship to junior team members, fostering a culture of innovation and learning.
Qualifications:
- Masters or Ph.D. degree in Computer Science, Electrical Engineering, or a related field.
- Proven experience (5+ years) in LLVM/MLIR-based compiler development, particularly in graph compilers for AI-ML applications.
- Familiarity with AI-ML frameworks like TensorFlow, PyTorch, or ONNX and their compiler integration.
- Experience with vectorization and parallel programming models such as OpenMP, SYCL, CUDA, or GPGPU programming.
- Solid understanding of hardware-software co-design principles and performance optimization techniques.
- Strong analytical and problem-solving abilities.
- Excellent communication and collaboration skills.
- Ability to thrive in a fast-paced startup environment.