675 Systemverilog Jobs - Page 9

Job Description We are seeking a Senior Staff Verification Engineer to lead and contribute to the functional verification of complex SoC and IP designs for next-generation AI, HPC, and data center products. The ideal candidate has extensive experience in UVM/SystemVerilog , SoC and IP-level verification, and is passionate about ensuring first-pass silicon success . This role involves defining verification strategies, developing scalable environments, and collaborating cross-functionally with architecture, design, and software teams. Experience with Virtual Modeling, SystemC, and TLM is a plus , enabling advanced verification and early system-level validation. Qualifications Required Qualifications Education & Experience B.S./M.S. in Electrical Engineering, Computer Engineering, or related field. 8+ years of experience in IP/SoC verification with a proven track record of successful silicon delivery. Technical Expertise Deep knowledge of UVM/SystemVerilog for testbench development and verification IP integration. Strong understanding of SoC architecture and protocols such as DDR5, HBM3, PCIe Gen6, CXL 3.0 , and other high-speed interfaces. Expertise in coverage-driven verification , constrained-random testing, and assertion-based verification. Proficient in debugging RTL, testbenches, and simulation failures using industry-standard tools. Tools & Languages Hands-on experience with simulation tools (VCS, Xcelium, Questa, etc.), waveform viewers, coverage tools, and automation scripting (Python, Perl, TCL). Preferred/Additional Skills Virtual Modeling and System-Level Verification Familiarity with SystemC and Transaction-Level Modeling (TLM) for virtual prototyping and early system validation. Experience developing or using virtual platforms for hardware/software co-verification is a strong plus. Emulation & Prototyping Exposure to emulation platforms (Palladium, ZeBu) and FPGA-based prototyping for system-level validation and performance analysis. Software Co-verification Experience working alongside firmware/software teams for pre-silicon software validation and early driver/OS bring-up. Low-Power and DFT Verification Knowledge of power-aware verification (UPF/CPF) and DFT validation methodologies is desirable. Additional Information Key Responsibilities Verification Planning & Execution Lead the definition, development, and execution of comprehensive verification plans at IP and SoC levels. Develop UVM/SystemVerilog-based testbenches , including stimulus generation, checkers, and monitors for advanced SoC designs. Drive coverage-driven verification processes, ensuring functional and code coverage goals are met. Cross-Functional Collaboration Collaborate with architecture, RTL design, firmware, software, and emulation teams to define verification requirements and ensure comprehensive test coverage. Participate in design and architecture reviews , providing critical feedback on functionality, testability, and performance considerations. Debug & Issue Resolution Lead debug efforts on complex SoC and IP issues through simulation, emulation, and FPGA prototypes. Perform root-cause analysis and drive issues to closure in partnership with cross-disciplinary teams. Methodology & Infrastructure Development Enhance and maintain verification methodologies , including reusable verification IP, automation scripts, and regression infrastructure. Evaluate and adopt new tools and verification technologies to improve quality and efficiency. Leadership & Mentorship Provide technical guidance and mentorship to junior verification engineers. Lead verification reviews and strategy discussions , ensuring high technical standards and best practices. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement . Job title Sr Staff Verification Engineer – SoC/IP Design Verification Department Manufacturing Location Hyderabad Remote No Requisition ID 20020172_2025-07-03

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: SE NIOR SILICON DESIGN ENGINEER THE ROLE : We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Develop/Maintain tests for functional verification and performance verification at the core level Build testbench components to support the next generation IP Maintain or improve current test libraries to support IP level testing Create hardware emulation build to verify the IP functional performance Maintain and improve current hardware emulation environment to speed up the runtime performance and improve the debug facility Provide technical support to other teams PREFERRED EXPERIENCE: Good at C/C++ Familiarity with SystemVerilog and modern verification libraries like UVM Experience/Background on Computing/Graphics is a benefit Experience with OpenGL/OpenCL/D3D programming is a benefit ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-SR5 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Job Description Collaborate with system architects and micro-architects to define high-level, implementable SoC specifications. Own end-to-end SOC RTL delivery while analysing and optimizing design for power, performance, and area (PPA) targets. Influence SoC definition, features, and adopt physical design friendly partitioning. Lead RTL design and integration of multi-subsystem SoCs , supporting complex architectures with multi-core, multi-power, and multi-reset domains . Demonstrate strong proficiency with front-end flows , including Lint, CDC, low-power (UPF) checks, synthesis, DFT , and Static Timing Analysis (STA) . Drive the development of robust Safety, Security, and Debug architectures for advanced SoCs with multiple interconnects. Design and integrate standard interface protocols such as AHB, AXI, CHI , and memory interfaces including ROM, RAM, Flash, LPDDR/DDR3/4 . Engage cross-functionally with DFT, physical design, verification, emulation, and validation teams to ensure first-time-right silicon and on-time project delivery. Support post-silicon debug, bring-up, and validation , working closely with lab and silicon validation teams. Continuously evaluate and adopt new design methodologies and best practices to improve productivity and shift-left the design cycle. Mentor junior engineers, review their work, and provide technical leadership and guidance across multiple design projects. Provide overall leadership and tracking of the team’s goals. Contribute to the innovation quotient of the team via Desing Patents, Industry Standard Publications, AI-enabled design methodologies etc. Qualifications M.Tech/ B.Tech in Electrical Engineering or Computer Science with 12+ years of RTL design experience. Proven expertise in Verilog/SystemVerilog RTL design, integration, and microarchitecture. Strong understanding of SoC architecture, AMBA protocols (AXI, AHB, APB), clock/power domains, and memory subsystems. Experience with EDA tools for synthesis, lint, CDC, RDC, and timing analysis. Familiarity with UPF/low-power design, formal verification techniques, and static/dynamic checks. Excellent leadership, communication, and project management skills. Experience working with global cross-functional teams. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement . Job title Principal Engineer,RTL Department Engineering Location Noida Remote No Requisition ID 20019236_2025-03-01

You will be responsible for designing and developing Debug IPs focusing on CoreSight IP design. Your role will involve ensuring that the Debug IPs meet the required specifications and performance standards. You will utilize your expertise in RTL design using Verilog and/or SystemVerilog for complex SoC development. Additionally, you will apply your knowledge of Arm-based designs and/or Arm System Architectures to develop and optimize IPs. Collaboration with cross-functional teams, SoC integration & Architecture teams is essential to ensure successful IP delivery within specified timelines. Implementing rigorous verification processes to ensure that the IPs meet all functional and performance requirements is a key aspect of the role. To qualify for this position, you should hold a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in RTL design for complex SoC development using Verilog and/or SystemVerilog is required. A strong understanding of Arm-based designs and/or Arm System Architectures is essential. Proficiency in IP design, verification, and delivery, with a focus on Debug IPs, is also a key requirement. Excellent communication and collaboration skills are necessary to effectively work with cross-functional teams. Preferred skills for this role include experience with CoreSight based Debug IP design and strong problem-solving and analytical skills.,

As an AMS Verification Engineer, you will be responsible for working on Analog Mixed-Signal (AMS) Verification for SoCs, subsystems, and IPs. Your role will involve hands-on experience with AMS simulation environments using tools such as Cadence, Synopsys, or Mentor. It is essential to have a solid understanding of analog and mixed-signal circuits, including comparators, op-amps, switched-cap circuits, ADCs/DACs, current mirrors, charge pumps, and regulators. Your expertise in Verilog, Verilog-A, Verilog-AMS, and Verilog-D for behavioral modeling will be crucial for block-level and chip-level AMS verification. This includes top-level testbench development, self-checking testbenches, and regression suites. Exposure to SystemVerilog (SV) and UVM from an AMS perspective will be considered a plus. Proficiency in scripting languages such as Python, Perl, TCL, or SKILL for automation is required. You should be fluent with Cadence Virtuoso-based analog design flow, encompassing schematic capture, simulator/netlist configuration, and SPICE simulation. Your ability to extract, analyze, and document simulation results and present findings in technical reviews is highly valued. Furthermore, familiarity with test plan development, AMS modeling, and verification methodologies is essential. You will also be involved in supporting post-silicon validation and correlating measurement data with simulations. As a valued team member, you should be team-oriented, proactive, and able to contribute effectively in a multi-site development environment.,

Silicon Interfaces is looking for VLSI Design Engineers (1 - 3 Years) Experienced as Team Members and (3+ - 6 Years) Experienced as Team Leads. Job Description: Be a part of a specialized team of Engineers working on new Technologies projects in SystemVerilog/UVM, Portable Stimulus Standards(PSS) based Domain Specific Language (DSL), Fault Simulation, multi Core Processor Verification and Low Power Designs in Data Communications, Wired and Wireless Networking as well as Interconnect Technologies. Skills Required : Logic Design, SystemVerilog, UVM and Protocols, like I2C, USB, Ethernet, 802.11, PCI/PCIei, Amba/AXI/CHI as well as Linux, Gvim/VI, Shell Scripting, Etc Education : BE/B.Tech/ME/M.Tech in Electronics and/or Communications Engineering Tier 1/2 Engineering Colleges Silicon Interfaces services global footprint Semiconductor Services centers in North America, Europe, and Asia Pacific by VPN-based logins, in-person Customer site deployment (North America, Europe, and Asia Pacific (including India) and also Offshore projects from our state-of-the-art VLSI Design Centers based out of Mumbai. Silicon Interfaces actively participates as authors in Tier-1 Conferences, like Design Automation Conference, DATE, DVCon in USA, Europe, Taiwan, Japan and India. The Job is based in Mumbai, India and the company is currently doing WfO (Work from Office). With Safety as the first priority, the Company has an augmented benefits program. If you like to apply please send an email to recruit@siliconinterfaces.com

Role: Functional verification Engineer Skills: UVM,Verilog or SystemVerilog, SOC, ASIC, AMBA Bus Protocols Location: Hyderabad Experience: 4-10 yrs Open Positions: 8 Client: AMD Notice Period- Immediate - 45 Days Skills: amba,systemverilog,soc,verilog,amba bus protocols,functional verification,dv,uvm,asic

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 8 - 15 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the everyday #LI-EDA #LI-Hybrid #DVT

Job Title: RTL Design Engineer Experience: 3–5 Years Company: eInfochips (An Arrow Electronics Company) Location: Ahmedabad/ Noida Job Type: Full-Time Job Description: eInfochips is looking for talented RTL Design Engineers with 3–5 years of experience in digital design. You will be working on IP and SoC-level RTL development for leading semiconductor clients across domains like Automotive, Consumer, Industrial, and AI. Key Responsibilities: RTL design using Verilog/SystemVerilog for IP and SoC subsystems Perform synthesis, linting, CDC/RDC analysis Interface with verification, physical design, and architecture teams Support SoC integration and debug Ensure design quality and timing closure Required Skills: 2+ years of hands-on RTL design experience Strong in digital design concepts (FSMs, pipelining, FIFOs) Proficient with tools like Synopsys Design Compiler, SpyGlass, VCS Experience with standard protocols (AXI, AHB, APB) Basic scripting skills (TCL, Perl, Python) How to Apply: 📩 Send your resume to: Nshalini.singh@einfochips.com

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Our IP Scaling (IPS) organization is focused on creating customized IP for Alphawave Semi's expanding customer base. We deliver industry-leading high-speed interconnect solutions tailored to specific requirements across a wide variety of use-cases including High Performance Computing and Artificial Intelligence. We are looking for an enthusiastic Design Verification Engineer to join our fun and dynamic team of experienced innovators. What you'll do: Own the end-to-end verification of new customer features Review design specifications and devise verification plans Build testbenches and analyze test failures to uncover design bugs Facilitate bit-matching of RTL design and MATLAB system models Integrate 3rd party VIPs for compliance testing of standard protocols Build releases of our design IP for customers Support post-silicon validation and bring-up activities Take on opportunities to lead, plan, and coordinate tasks with team members Collaborate closely with Design, Systems, Analog, FW, and PD teams Contribute to the continuous improvement of verification methodologies and processes What you'll need: 5+ years of ASIC design verification experience An applied understanding of UVM and verification techniques Experience with constrained-random verification in SystemVerilog and UVM Formal Verification, and Power-aware UPF verification techniques Tools/Languages - SystemVerilog, UVM, Python, Perl, C/C++, GNU Make Verification experience in SerDes PHY, DSP, and Analog mixed signal is desirable Knowledge in Ethernet and PCIe standards is desirable ''We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 8 - 15 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the everyday #DVT

Job Description DV Positions: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause and resolve functional failures in the design, partnering with the Design team Qualifications and Skills for DV Positions: Bachelor's or Masters degree in Computer Science, Electronics Engineering or equivalent practical experience 5+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 5+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies Experience in development of UVM based verification environments from scratch Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle Experience with verification of ARM/RISC-V based CPU sub-systems or SoCs Experience with IP or integration verification along with expertise of protocols like AMBA, PCIe, DDR, USB, Ethernet Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments Experience with revision control systems like Mercurial(Hg), Git or SVN

Minimum qualifications: Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or related field, or equivalent practical experience. 5 years of experience with ML/AI frameworks and libraries (e.g., TensorFlow, PyTorch, scikit-learn). Experience with hardware description languages (e.g., Verilog, SystemVerilog, VHDL). Experience with applying ML/AI techniques. Preferred qualifications: Experience with ML/AI applications in hardware design, verification and Low Power (e.g., formal verification with ML, coverage closure with ML). Experience with verification methodologies (UVM, OVM). Experience in data preprocessing and feature engineering, hardware architecture and microarchitecture. Experience with simulation tools (e.g., Synopsys VCS, Cadence Xcelium, Mentor Questa). Excellent programming skills in Python or C++. About The Job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Research, design, and implement ML/AI algorithms techniques for various verification tasks, including test case generation, coverage analysis, bug prediction, and performance optimization. Develop and maintain tools and scripts for data collection, pre-processing, model training, and evaluation. Analyze large datasets of simulation results, logs, and other verification data to identify patterns and trends. Build and train ML models for various verification applications, such as anomaly detection, pattern recognition, and prediction. Evaluate model performance and iterate to improve accuracy and efficiency. Participate in verification planning and develop test plans that incorporate ML/AI-driven techniques. Execute verification tests and analyze results to identify bugs and coverage gaps. Develop and maintain verification tools and scripts to automate verification tasks. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

Hi All, Greetings' from Eximietas Design....! We are Hiring RTL Micro Architect Engineers/Leads ...! Job Title: RTL Micro Architect Experience: 8+ years Location: Bangalore & Visakhapatnam Job Description: Eximietas Design is seeking an experienced and highly skilled RTL Micro Architect to join our growing team. As a key contributor, you will play a critical role in defining and implementing the microarchitecture of cutting-edge semiconductor designs. You will work on complex RTL design challenges, collaborate with cross-functional teams, and contribute to the delivery of high-performance, power-efficient, and innovative solutions. Key Responsibilities: Define and develop microarchitecture specifications for complex SoC designs. Lead RTL design and implementation using Verilog/SystemVerilog, ensuring optimal performance, power, and area (PPA). Collaborate with system architects, verification teams, and physical design teams to ensure successful project execution. Perform design trade-off analysis to meet functional, performance, and power requirements. Develop and implement design methodologies to improve efficiency and quality. Mentor and guide junior engineers, fostering a culture of innovation and excellence. Participate in design reviews, provide technical leadership, and ensure adherence to project timelines. Qualifications: 8+ years of hands-on experience in RTL design and microarchitecture development. Strong expertise in RTL design using Verilog/SystemVerilog and logic synthesis . Proficiency in microarchitecture design for complex SoCs, including pipelining, caching, and memory subsystems . Experience with low-power design techniques (e.g., clock gating, power gating, multi-Vt optimization). Familiarity with advanced process nodes and their specific challenges (e.g., finFET, multi-patterning). Strong scripting skills in Tcl, Python, or Perl for automation and flow development. Excellent problem-solving skills and attention to detail. Strong communication and leadership skills. What We Offer: Opportunity to work on cutting-edge semiconductor designs and innovative technologies. Collaborative and inclusive work environment. Competitive compensation and benefits package. Professional growth and development opportunities. Interested Engineers please share your updated resume : maruthiprasad.e@eximietas.design

As a VLSI Design Engineer at Kinara, you will be part of a dynamic team focused on edge AI technology, pushing the boundaries of what's achievable in machine learning and artificial intelligence. You will contribute to the development of state-of-the-art AI processors and high-speed interconnects, ensuring unmatched performance, power efficiency, and scalability to meet the demands of modern AI applications. Your role will involve working on cutting-edge semiconductor projects, requiring a blend of technical expertise, problem-solving skills, and collaborative teamwork. Your responsibilities will include defining micro-architecture and creating detailed design specifications, developing RTL code based on system-level requirements using Verilog, VHDL, or SystemVerilog, implementing complex digital functions and algorithms in RTL, and executing comprehensive test plans to verify RTL designs. You will optimize designs for power, performance, and area constraints, conduct simulation and debugging activities to ensure design accuracy, collaborate with verification engineers to develop test benches and validate RTL against specifications, and apply your strong understanding of digital design principles and concepts. To excel in this role, you should possess proficiency in writing and debugging RTL code, experience with synthesis, static timing analysis, and linting tools, familiarity with scripting languages like Python, Perl, or TCL for automation, and expertise in processor subsystem design, interconnect design, or high-speed IO interface design. A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, along with 5+ years of experience in RTL design and verification, is required. Proven experience in digital logic design using Verilog, VHDL, or SystemVerilog, familiarity with simulation tools such as VCS, QuestaSim, or similar, and hands-on experience with RTL design tools like Synopsys Design Compiler and Cadence Genus is preferred. At Kinara, we offer an innovative environment where technology experts and mentors collaborate to tackle exciting challenges. We believe in sharing responsibilities and valuing diverse viewpoints. If you are passionate about making a difference in the field of edge AI technology, we invite you to join our team and contribute to creating a smarter, safer, and more enjoyable world. Your application is eagerly awaited as we look forward to reviewing your qualifications and experiences. Make your mark with us at Kinara!,

As a VLSI Mentor / Guest Faculty specializing in Advanced Digital Systems & Low Power Design at Spandsons Horizon Engineering, you play a crucial role in guiding 5th, 6th, and 7th-semester B.E./B.Tech students in advanced VLSI concepts and practical applications. This contract role, based in Salem, offers a unique opportunity to directly influence the academic and career growth of 60 aspiring engineers. Your key responsibilities include delivering engaging sessions covering topics such as Advanced Digital System Design with Verilog HDL and Low Power VLSI Design. You will also provide hands-on guidance for lab assignments and projects using various tools like Xilinx Vivado, ModelSim, LTspice, and more. Facilitating interactive learning and ensuring alignment with the semester curriculum are essential aspects of this role. To qualify for this position, you need a minimum of 4-5 years of industry experience in VLSI design, proficiency in relevant EDA tools and hardware platforms, excellent communication skills, and a passion for teaching and mentoring. The program details include a total of approximately 60 students, with sessions scheduled on Thursdays and Fridays for 12 hours per week starting on July 24th & 25th. The program will run for Semesters 5, 6, and 7. In addition to a comprehensive program, benefits such as accommodation, food, and the opportunity to impact the next generation of VLSI engineers are provided. Join us at Spandsons Horizon Engineering and be part of a forward-thinking academic institution.,

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. As a new graduated Silicon Validation Engineer, you are a dedicated and innovative professional with a passion for advancing technology. You have a strong background in electronics engineering and a keen eye for detail. You thrive in collaborative environments, working seamlessly with R&D teams to drive the success of cutting-edge projects. Your problem-solving skills are exceptional, and you are adept at troubleshooting complex systems and equipment. With a commitment to continuous learning, you stay updated with the latest industry trends and technologies. You are proactive, self-motivated, and ready to take on new challenges in a dynamic and fast-paced environment. Developing test strategies for validation of silicon devices in conjunction with R&D engineering teams. Writing and implementing test programs for National Instruments LabVIEW-based equipment. Performing hands-on testing of devices using National Instruments LabVIEW-based equipment in the Plymouth lab facility. Designing and verifying SystemVerilog RTL targeting FPGA implementations. Creating schematics for test boards and fixtures. Recording and analyzing product test results and equipment logs. Ensuring the reliability and performance of Synopsys PVT Sensors across various applications. Contributing to the development of cutting-edge on-chip sensor products targeting the latest technology processes. Enhancing product quality through meticulous validation and testing procedures. Collaborating with a skilled team of engineers to drive innovation and technological advancements. Providing critical insights through data analysis to inform product improvements. Supporting the optimization of performance, power, and other requirements for a diverse range of applications. University degree/masters or similar, either in Electronics Engineering or related field. Some background of FPGA design using HDL would be beneficial, i.e. SystemVerilog. Basic understanding of the design of digital and analogue circuits for device validation and testing. Elementary understanding of component level device test methods. Some experience of PCB schematic capture using suitable CAD software. A familiarity with programming and scripting skills in one or more of VB script, python, tcl & bash. Ability to do basic statistical and data analysis for silicon devices and test results. You are an analytical thinker with excellent problem-solving abilities. You have strong communication skills and work effectively within a team. Your attention to detail ensures high-quality results, and you are driven by a commitment to continuous improvement. You are adaptable, proactive, and capable of managing multiple tasks efficiently. You will join a dynamic R&D team focused on the development of Synopsys PVT Sensors. This team is comprised of skilled engineers dedicated to pushing the boundaries of technology and delivering innovative solutions. Collaboration and knowledge sharing are key aspects of the teams success, fostering an environment where creativity and technical excellence thrive. We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.,

The company Eximietas Design is currently seeking an experienced and highly skilled RTL Micro Architect to join their team in Bangalore. As the RTL Micro Architect, you will be responsible for defining and implementing the microarchitecture of advanced semiconductor designs. Your role will involve working on challenging RTL design tasks, collaborating with various teams, and contributing to the development of high-performance and power-efficient solutions. Your key responsibilities will include defining microarchitecture specifications for complex SoC designs, leading RTL design and implementation using Verilog/SystemVerilog, collaborating with different teams to ensure project success, performing design trade-off analysis, developing design methodologies for efficiency improvement, mentoring junior engineers, participating in design reviews, and providing technical leadership. To qualify for this position, you should have at least 8 years of hands-on experience in RTL design and microarchitecture development, strong expertise in RTL design using Verilog/SystemVerilog and logic synthesis, proficiency in microarchitecture design for complex SoCs, experience with low-power design techniques, familiarity with advanced process nodes, strong scripting skills in Tcl, Python, or Perl, excellent problem-solving skills, and effective communication and leadership skills. In return, Eximietas Design offers you the opportunity to work on cutting-edge semiconductor designs and innovative technologies, a collaborative work environment, competitive compensation and benefits package, and professional growth and development opportunities. If you are interested in this position, please share your updated resume with maruthiprasad.e@eximietas.design.,

You are a FPGA design engineer with at least 5 years of experience, located in Vadodara, India. Your main responsibility is to implement control logic state machines and DSP algorithms in FPGA fabric for high throughput systems. You should possess excellent troubleshooting and debugging skills for both simulation and in-circuit scenarios. Your expertise should include: - Strong knowledge of digital design involving multiple clock domains - RTL design in Verilog and System-Verilog - Creating micro-architecture from high-level specifications - Functional simulation using ModelSIM or similar tools - FPGA design and synthesis, map and route flow, pin assignments, attribute assignments, resource fixing, and design partitioning - Targeting designs for Intel(Altera) or Xilinx FPGAs using Quartus Prime or Vivado - IP creation and parametrization using Vivado or Quartus - Debugging using ChipScope/SignalTap and lab bench oscilloscopes/protocol analyzers - Understanding of static timing analysis and timing closure using SDC - Collaborating with a cross-functional, global team of hardware designers, software engineers, verification and validation engineers - Leading teams to successful project completion within deadlines - Strong problem-solving skills It would be beneficial if you also have expertise in: - Knowledge of TCL scripting and Python - Transceivers and PHY - Power estimation and resource utilization estimation - Soft-processor cores like Microblaze or Nios-II - Understanding of Digital Signal Processing concepts - Proficiency in Matlab or Python for algorithm design - Familiarity with embedded systems/C/C++ About A&W Engineering Works: A&W Engineering Works is committed to developing and deploying innovative solutions to real-world problems. The company specializes in developing complete systems from front-end sensors to back-end applications, covering analog, digital signal processing, and algorithmic data and control paths. The team at A&W Engineering Works has a wide range of expertise in hardware, software, mechanical engineering, and systems development, aiming to solve complex problems efficiently with innovative development techniques and fast prototyping. To apply for this position, please send an email to [email protected] with your resume and cover letter attached, and remember to include the job title in the subject line.,

As a Senior Hardware Design Engineer at Agnisys, you will have the opportunity to work on high-tech semiconductor products by joining our R&D team. We provide a progressive and innovation-driven environment that promotes constant learning, which is crucial for personal and professional growth. Basic Requirements: - A B.Tech degree in Electronics and Communication Systems - Proficiency in Verilog, VHDL, SystemVerilog & C - Experience with FPGA, EDA Tools, Linux, Perl, and Tcl - Excellent communication skills - Ability to work independently with minimal supervision and collaboratively within a team - Strong multi-tasking skills - Self-motivated with a solid team spirit Job Responsibilities: - Design, plan, document, and develop new hardware products from initial requirements to production-ready prototypes - Maintain existing designs and create new variants to incorporate new features and manage component end-of-life issues - Collaborate with Hardware team members, Product Management, Software Engineering, and Manufacturing to deliver reliable and standards-compliant products About Agnisys: Agnisys Inc. is a prominent supplier of Electronic Design Automation (EDA) software aimed at addressing complex design and verification challenges in system development. Our products facilitate a unified specification-driven development flow, enabling users to describe registers and sequences for SoC and IP projects and automatically generate RTL design, UVM testbenches, C/C++ embedded code, and documentation. This approach accelerates design, verification, firmware, and validation processes. Leveraging patented technology and user-friendly interfaces, our specification automation tools enhance productivity, efficiency, and accuracy in system design and verification. Established in 2007, Agnisys is headquartered in Boston, Massachusetts, with R&D centers in Milpitas, CA, and Noida, India. Location: Noida Job Type: Full-time Schedule: Monday to Friday Work Location: In person,

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Data Centre Engineering Group develops Custom Silicon products tailored for the Data Centre market, focusing on cutting-edge Accelerated Infrastructure solutions for Networking, Switching, Connectivity, and Compute. The team works on high-performance and scalable architectures, ensuring optimized performance, power efficiency, and reliability to meet evolving data center demands. By collaborating across multiple teams, the group delivers best-in-class silicon solutions that drive innovation in next-generation data center applications. What You Can Expect Architect and implement simulation test bench in UVM. Develop and execute test-plans for verifying correctness and performance of the design. Own and debug failures in simulation to root-cause problems Closely work with logic designers of the block being verified for test plan development, execution, debug, coverage closure and gate level simulations What We're Looking For Bachelor’s degree in CS/EE with 13–15 years of relevant experience, or Master’s degree in CS/EE with 10–12 years of relevant experience Strong background in IP and SoC verification, including methodology and testbench development Proficient in hardware verification languages such as Verilog, SystemVerilog, UVM, and C/C++ Solid understanding of verification methodologies: object-oriented programming, white-box/black-box testing, directed/random testing, coverage analysis, and gate-level simulations Experience in Unix/Linux environments; scripting skills in Shell, Perl, or Python are a plus Strong analytical and problem-solving skills Ability to manage multiple tasks in a fast-paced environment Excellent communication, interpersonal, and teamwork skills Capable of interfacing effectively at all levels within and outside the organization Proactive in participating in problem-solving and quality improvement initiatives Additional Compensation And Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Alternate Job Titles: ASIC Verification, Sr. Engineer Sr. Engineer, Digital Verification We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and innovative engineer with a strong background in high-speed protocols and a keen interest in growing your expertise through verification-related work. You thrive in a collaborative environment, working alongside experienced digital design and verification professionals. With a solid foundation in Verilog, VHDL, and/or SystemVerilog, you are eager to expand your knowledge and apply your skills to state-of-the-art products. Your excellent problem-solving abilities and strong communication skills enable you to identify and address design issues effectively. You are organized, detail-oriented, and capable of managing multiple tasks efficiently. With your passion for learning and exploring new technologies, you are committed to contributing to the success of our projects and the broader goals of Synopsys. What You’ll Be Doing: Identify verification environment requirements from various sources, including specifications, design functionality, and interfaces. Generate verification test plans, environment documentation, and usage documentation. Define, develop, and verify complex UVM verification environments. Evaluate and exercise various aspects of the development flow, including Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modeling, and verification coverage metrics. Identify design problems, propose corrective actions, and address inconsistencies in documented functionality. Collaborate with cross-functional teams to ensure the successful integration and verification of projects. The Impact You Will Have: Ensure the robustness and reliability of our digital designs through meticulous verification processes. Contribute to the development of cutting-edge technologies that power the Era of Smart Everything. Enhance the overall quality and performance of our silicon IP products. Help our customers bring differentiated products to market quickly and with reduced risk. Drive continuous improvements in our verification methodologies and practices. Support the growth and success of Synopsys by contributing to our reputation for innovation and excellence. What You’ll Need: Proven desire to learn and explore new state-of-the-art technologies. Demonstrated proficiency in Verilog, VHDL, and/or SystemVerilog. Experience with scripting languages such as BASH, TCSH, PERL, PYTHON, or TCL is a plus. Understanding of verification methodologies such as UVM is a plus. Strong organizational and communication skills. 3+ years of relevant experience in ASIC digital verification. Who You Are: A passionate and innovative engineer with a strong technical background. Detail-oriented and capable of managing multiple tasks efficiently. Excellent problem-solving abilities and a proactive approach to addressing challenges. Strong communication skills, both written and spoken. A collaborative team player who thrives in a dynamic and fast-paced environment. The Team You’ll Be A Part Of: You will join an experienced and dedicated digital design and verification team focused on developing state-of-the-art products. Our team is committed to excellence and continuous improvement, working collaboratively to achieve our goals. You will have the opportunity to learn from experts in various fields and contribute to the success of our projects. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Job Description Key Responsibilities – AMS Verification Work in Analog Mixed-Signal (AMS) Verification for SoCs, subsystems, and IPs. Hands-on experience with AMS simulation environments using Cadence, Synopsys, or Mentor tools. Solid understanding of analog and mixed-signal circuits, including comparators, op-amps, switched-cap circuits, ADCs/DACs, current mirrors, charge pumps, and regulators. Strong knowledge of Verilog, Verilog-A, Verilog-AMS, and Verilog-D for behavioral modeling. Experience in block-level and chip-level AMS verification, including top-level testbench development, self-checking testbenches, and regression suites. Exposure to SystemVerilog (SV) and UVM from an AMS perspective is a plus. Proficiency in scripting languages such as Python, Perl, TCL, or SKILL for automation. Fluency with Cadence Virtuoso-based analog design flow, including schematic capture, simulator/netlist configuration, and SPICE simulation. Ability to extract, analyze, and document simulation results and present findings in technical reviews. Familiarity with test plan development, AMS modeling, and verification methodologies. Supporting post-silicon validation and correlating measurement data with simulations. Team-oriented, proactive, and able to contribute in a multi-site development environment.

We are seeking a highly skilled SOC Functional Verification Engineer with expertise in UVM, Verilog/SystemVerilog , and AMBA bus protocols . The ideal candidate will have a strong background in SOC and ASIC verification and be capable of independently handling complex testbench environments and verification tasks. Key Responsibilities Develop and execute functional verification plans for SOC/ASIC designs using SystemVerilog and UVM methodologies. Design, develop, and maintain testbenches, scoreboards, and checkers. Write and run directed and random tests, analyze results, and debug functional failures. Collaborate closely with design, architecture, and software teams to ensure comprehensive verification coverage. Implement code and functional coverage metrics and drive improvements. Work with AMBA bus protocols (AXI, AHB, APB) and verify IP-level and SOC-level integrations. Contribute to verification methodology improvements and reusable IP verification components. Required Skills Strong hands-on experience with SystemVerilog/UVM for functional verification. Solid understanding of ASIC/SOC verification flows. Familiarity with AMBA bus protocols (AXI, AHB, APB). Experience with Verilog for RTL understanding and analysis. Proficient in debugging using simulators and waveform viewers (e.g., VCS, ModelSim, Questa). Knowledge of functional coverage and assertions (SVA) is preferred. Experience with version control and scripting (e.g., Python, Perl, Shell) is a plus. Skills: shell,amba bus protocols,dv,axi,perl,systemverilog,amba,asic,python,functional coverage,soc,functional verification,verilog,apb,ahb,assertions,uvm,debugging

Alternate Job Titles: ASIC Verification, Sr. Engineer Sr. Engineer, Digital Verification We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and innovative engineer with a strong background in high-speed protocols and a keen interest in growing your expertise through verification-related work. You thrive in a collaborative environment, working alongside experienced digital design and verification professionals. With a solid foundation in Verilog, VHDL, and/or SystemVerilog, you are eager to expand your knowledge and apply your skills to state-of-the-art products. Your excellent problem-solving abilities and strong communication skills enable you to identify and address design issues effectively. You are organized, detail-oriented, and capable of managing multiple tasks efficiently. With your passion for learning and exploring new technologies, you are committed to contributing to the success of our projects and the broader goals of Synopsys. What You’ll Be Doing: Identify verification environment requirements from various sources, including specifications, design functionality, and interfaces. Generate verification test plans, environment documentation, and usage documentation. Define, develop, and verify complex UVM verification environments. Evaluate and exercise various aspects of the development flow, including Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modeling, and verification coverage metrics. Identify design problems, propose corrective actions, and address inconsistencies in documented functionality. Collaborate with cross-functional teams to ensure the successful integration and verification of projects. The Impact You Will Have: Ensure the robustness and reliability of our digital designs through meticulous verification processes. Contribute to the development of cutting-edge technologies that power the Era of Smart Everything. Enhance the overall quality and performance of our silicon IP products. Help our customers bring differentiated products to market quickly and with reduced risk. Drive continuous improvements in our verification methodologies and practices. Support the growth and success of Synopsys by contributing to our reputation for innovation and excellence. What You’ll Need: Proven desire to learn and explore new state-of-the-art technologies. Demonstrated proficiency in Verilog, VHDL, and/or SystemVerilog. Experience with scripting languages such as BASH, TCSH, PERL, PYTHON, or TCL is a plus. Understanding of verification methodologies such as UVM is a plus. Strong organizational and communication skills. 3+ years of relevant experience in ASIC digital verification. Who You Are: A passionate and innovative engineer with a strong technical background. Detail-oriented and capable of managing multiple tasks efficiently. Excellent problem-solving abilities and a proactive approach to addressing challenges. Strong communication skills, both written and spoken. A collaborative team player who thrives in a dynamic and fast-paced environment. The Team You’ll Be A Part Of: You will join an experienced and dedicated digital design and verification team focused on developing state-of-the-art products. Our team is committed to excellence and continuous improvement, working collaboratively to achieve our goals. You will have the opportunity to learn from experts in various fields and contribute to the success of our projects. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.