704 Rtl Coding Jobs - Page 11

End-to-end design and development of features for IBM high performance Mainframe and POWER processors and ASICs. Develop the feature, present the proposed architecture in the High level design discussions Estimate the overall effort to develop the feature Develop micro-architecture, Design RTL, Collaborate with the Verification, Physical design, FW teams to develop the feature Pre Silicon: Signoff the Design that meets all the functional, area and timing goals Post Silicon: Bringup and Validate the hardware functionality Required education Bachelor's Degree Required technical and professional expertise 1 to 3 years of professional experience Experience with HDLs- VHDL/ Verilog Understand and...

We are seeking a highly experienced Staff Design Engineer with 10+ years of expertise in RTL design and digital signal processing for our Bengaluru location (max 30 days notice period). The ideal candidate will be responsible for designing, developing, and integrating custom DSP components such as filters, FFTs, and control logic for Aevas advanced 4-D Lidar processing chip across ASIC and FPGA platforms. The role involves creating micro-architecture specifications, writing and validating SystemVerilog RTL code, and ensuring designs meet stringent performance, low-power, and robustness requirements. The engineer will collaborate with architects, verification, and system software teams to ach...

Job Description We are looking for an experienced Design Verification Engineer to join our team and contribute to the verification of complex SoC/ASIC designs. The ideal candidate will have strong expertise in verification methodologies, testbench development, and debugging. Key Responsibilities: Develop and implement verification plans, environments, and testbenches using SystemVerilog/UVM. Write and execute test cases for functional, regression, and coverage-driven verification. Perform debugging and root cause analysis for design and verification issues. Collaborate with RTL design, architecture, and validation teams to ensure quality deliverables. Analyze functional coverage metrics and ...

Education: Bachelors degree (BE/B.Tech)orMasters degree (ME/M.Tech) Roles & Responsibilities: Acquire knowledge microarchitecture an ASIC unit by studying the specification and interacting with the logical design team. Write and perform the test plan in close cooperation with the logical design team. Develop coverage models and verification environments using UVM-SystemVerilog C++. Write, maintain and publish the verification specification. Monitor, analyze and debug simulation errors. Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time. Produce a maintainable and reusable code across projects Required Skills and Experience ...

Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify and evaluate the VLSI components and hardware systems b. Determine architecture and logic design verification through software developed for component and system simulation c. Analyze designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions d. Conduct system evaluations and make appropriate recommendations to modify designs or repair eq...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

The people are the culture. We encourage a culture of passion for technology solutions that impact businesses. We also make sure that our people pursue their individual passions. Working with us means you get an in-depth understanding of a range of industries and emerging technologies that help us build solutions that are futuristic and impactful. More importantly, the experience of being at MarvyLogic may help you evolve as a person toward enjoying a more fulfilling life. Minimum BE/BS degree in Electrical/Electronics/Computer science required. At least 5-10 years of logic design and RTL coding experience with sound knowledge on verification and implementation concepts. Experience in physic...

You have an immediate job opening with one of your valuable clients in Hyderabad for FPGA with Firmware profiles. The ideal candidate should have at least 8 years of experience in FPGA, RTL Design, RTL Coding, Firmware, CDC, and Lint. The location for this position is Hyderabad and the notice period is immediate to 15 days. If you are interested in this opportunity, kindly share your updated profile with Anand Arumugam at anand.arumugam@modernchipsolutions.com or call +919900927620 for further discussion.,

The role involves designing and architecting VLSI and hardware-based products to facilitate exceptional client engagement and satisfaction. Key responsibilities include defining product requirements, implementing VLSI and hardware devices, upgrading design tools, analyzing hardware components, conducting cost-benefit analysis, and developing architectural designs. Additionally, the role requires understanding market-driven business needs, defining architecture requirements and strategies, creating proof of concepts, and providing technical leadership in product development. Moreover, the role involves collaborating with various teams, analyzing technology environments and client requirements...

You should have a Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science, focusing on computer architecture, or equivalent practical experience. With 4 years of experience in RTL coding and experience with RTL quality checks methodologies such as Lint, CDC, RDC. A Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science with a specialization in computer architecture is preferred. Experience in implementing Camera ISP image processing blocks, Video processing blocks, Machine Learning IPs, or other multimedia IPs like Display or Video Codecs would be advantageous. Also, familiarity with ASIC design methodologies for clock domai...

You will be responsible for Logic design, micro-architecture, and RTL coding, with hands-on experience in SoC design and integration for complex SoCs. It is essential to have expertise in Verilog/System-Verilog and knowledge of AMBA protocols like AXI, AHB, APB, as well as SoC clocking, reset, debug architecture, and peripherals such as USB, PCIE, and SDCC. Understanding Memory controller designs and microprocessors will be advantageous. Collaborating closely with SoC verification and validation teams for pre/post Silicon debug is a key aspect of this role. Your role will require hands-on experience in Low power SoC design, Multi Clock designs, and Asynchronous interfaces. Proficiency in usi...

This role is for an IP / SoC RTL Senior / Lead Design Engineer to be responsible for the development and integration of IP and sub-systems. The ideal candidate will have strong expertise in logic design, RTL coding, and ASIC development, with a focus on creating high-performance, complex digital designs. Responsibilities Responsible for IP / sub-system level micro-architecture development and RTL coding . Prepare block/sub-system level timing constraints . Integrate IP/sub-system into larger designs. Perform basic verification in either an IP verification environment or on an FPGA. Skills Expertise in Verilog is a must. Experience in Logic design, micro-architecture, and RTL coding is essent...

Job description Asic Design Engineering Manager Responsibilities Manage an ASIC design team responsible for various processing blocks in a SOC. Drive RTL design planning and execution, innovative design methodology development, u-Arch, IP design and SOC integration. Participate in silicon architecture, interface with Architecture, SW/FW, Design, Modelling, Emulation, and Post-Silicon Validation teams Partner with internal and external cross-functional teams, across all levels of a corporation, from executives, team managers and individual contributors including development engineers, capacity planners and supply chain experts Contribute to and drive development of and maintain overall silico...

Job description Meta is looking for Asic Engineer, EDA Infrastructure to join our dynamic team and embark on a rewarding career journey. Your role involves working on complex projects and ensuring that ASICs meet performance, power, and area requirements. Key Responsibilities : Design Planning : Collaborate with cross-functional teams to define project goals, scope, and design requirements for ASIC projects. Establish design plans, including specifications, milestones, and budgets. Architecture and Microarchitecture : Create architectural and microarchitectural specifications for ASIC designs, outlining high-level structure and functionality. RTL Design : Implement ASIC designs using hardwar...

Job description ASIC Engineer Design Responsibilities Architecture exploration Micro-architecture development RTL development using Verilog, System Verilog and HLS Lint, CDC, Synthesis, Power Optimization Soft and hard IP identification, selection and integration Collaboration with verification and emulation teams in test plan development and debug Collaboration with implementation team to close the design on timing and power Minimum Qualifications At least 7+ years of silicon development experience Track record of first-pass success in ASIC Development Experience with Verilog or System Verilog Experience in one of these skills: Micro-architecture and RTL development for complex control and ...

Job description Meta is looking for ASIC Engineer, Host & Userspace, Infra Silicon Enablement to join our dynamic team and embark on a rewarding career journey. Develop and implement ASIC design methodologies, including design, verification, and testing Collaborate with cross-functional teams to identify and understand requirements and develop solutions that meet business needs Develop and maintain design specifications, test plans, and documentation Participate in the full ASIC development cycle, including architecture, RTL design, verification, and synthesis Perform design optimization and analysis to ensure optimal performance and power efficiency Ensure compliance with industry standards...

Job description Meta is looking for ASIC Engineer, Power to join our dynamic team and embark on a rewarding career journey. Develop and implement ASIC design methodologies, including design, verification, and testing Collaborate with cross-functional teams to identify and understand requirements and develop solutions that meet business needs Develop and maintain design specifications, test plans, and documentation Participate in the full ASIC development cycle, including architecture, RTL design, verification, and synthesis Perform design optimization and analysis to ensure optimal performance and power efficiency Ensure compliance with industry standards and guidelines. Strong knowledge of ...

Job description Meta is looking for ASIC Engineer - Infra Specialist to join our dynamic team and embark on a rewarding career journey. Develop and implement ASIC design methodologies, including design, verification, and testing Collaborate with cross-functional teams to identify and understand requirements and develop solutions that meet business needs Develop and maintain design specifications, test plans, and documentation Participate in the full ASIC development cycle, including architecture, RTL design, verification, and synthesis Perform design optimization and analysis to ensure optimal performance and power efficiency Ensure compliance with industry standards and guidelines. Strong k...

Qualcomm India Private Limited is seeking a candidate with a minimum of 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FV. The ideal candidate should have experience in Logic design/micro-architecture/RTL coding, along with hands-on experience in designing and integrating complex multi clock domain blocks. Proficiency in Verilog/System-Verilog and knowledge of AMBA protocols like AXI, AHB, APB, clocking/reset/debug architecture are necessary. Experience in Multi Clock designs and Asynchronous interface is a must, as well as familiarity with tools in ASIC development such as Lint, CDC, Design compiler, and Primetime. Collaboration with Design verification and validation ...

Key Responsibilities 01 years of hands-on experience in implementing designs on FPGA Strong expertise in RTL coding using VHDL/Verilog/System Verilog Understanding of FPGA design flow including constraint definition, synthesis, floor planning, place & route, and timing closure Create block-level design documentation Write testbenches and sequences in SystemVerilog Work with lab equipment for validation and testing Familiarity with standard interface protocols (e.g., SPI, I2C, UART, etc.) Knowledge of modern FPGA architectures Exposure to scripting languages for automation Preferred Experience Hands-on experience with FPGA design tools like Libero Experience with Tcl/Perl/Python scripting Goo...

Job Description Change the world. Love your job. In this position, you will be working on high-speed mixed-signal communication circuits using state-of-the art process technology, as well as be involved in the design of high performance digital circuits interfacing to leading edge analog circuitry as part of an overall system. Your responsibilities will include RTL coding, simulation, synthesis, timing closure, verification, evaluation, debugging of high-speed communication chips both at the circuit level and behavioral level. As a design engineer, you will prepare test methods and specifications, assist in preparation of application information, data sheets and demo boards. You will develop...

You have an immediate job opening with one of our valuable clients in HYD locations for FPGA with Firmware profiles. The ideal candidate should have a minimum of 8 years of experience in FPGA, RTL Design, RTL Coding, Firmware, CDC, and Lint. The location for this position is in HYD with a notice period of immediate to 15 days. If you are interested in this opportunity, kindly share your updated profile with Anand Arumugam at anand.arumugam@modernchipsolutions.com or call at +919900927620 for further discussion.,

The DCAI and Silicon Eng Team is responsible for delivering leadership Xeon products to cloud and datacenter customers by developing industry-leading x86 core and differentiated IPs. These IPs enhance product performance and competitiveness in both Xeon and AI platforms. The IP design group within DCAI focuses on designing Coherent Fabric IP, Memory controller, NOC, PCIE, and other fundamental building blocks for Xeon server SOCs. We are currently looking for an experienced Senior Micro Architect to design, develop, and implement advanced Digital IO Controllers such as PCIe/CXL/UCIe systems for next-generation data center and AI chips. This role requires a unique blend of architectural exper...

You will be responsible for demonstrating expertise in RTL Coding using Verilog, System Verilog, or VHDL. Your role will involve a strong understanding of FPGA flow, Logic design, and Digital design. It is essential to have knowledge in FPGA architecture and proficiency in Tcl and Python scripting. You will be conducting Vivado testing of synthesis tool and other stages. This position does not entail Silicon RTL development or any HW flow or testing. Your communication skills are crucial, as you will be expected to communicate technical information in an organized and understandable manner. A customer-oriented approach is necessary, along with a demonstrated concern and willingness to assist...