693 Rtl Coding Jobs - Page 13

We are looking for a highly skilled Senior RTL Design Engineer with 8+ years of experience in designing complex digital IPs and SoCs. The ideal candidate should have strong RTL coding, micro-architecture, and synthesis knowledge, with a proven track record of successful tape-outs. Key Responsibilities: Develop RTL code in Verilog/SystemVerilog based on micro-architecture specifications Work on design partitioning, clock domain crossings, and low-power techniques Collaborate with verification, physical design, and DFT teams across the design cycle Perform lint, CDC, and synthesis with timing constraints Optimize design for area, performance, and power Participate in design reviews and documen...

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers.Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLLAdditional responsibilities:logic (RTL) design, timing closure, CDC analysis etc.Understand and Design Power efficient logic.Agile project planning and execution.RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure syst...

We are seeking highly motivated individuals with a BS, MS, or PhD degree in Computer Science, Computer Engineering/ECE, ready to handle the challenging problems in future technologies and designs. We are also looking for candidates with Strong C/C++background to lead our leading-edge algorithmswithin our EDA solutions to increase our design team’s productivity and chip quality and performance. Our dynamic global team is looking to enlist enthusiastic professionals to join world-class hardware design teams responsible for developing the most challenging and complex systems in the world. We are seeking energetic, highly motivated individuals willing to go the extra mile with the aim of helping...

Design and development of processor L2 , L3, Non cacheable units and LLC (Last Level Cache) for high-performance IBM Systems. - Design and architect L2 cache and LLC as driven by capacity, latency, bandwidth, and RAS requirements. - Develop the features, present the proposed architecture in the High level design discussions - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in...

As a Formal verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Develop skills in IBM Formal verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 – 10 years of relevant industry experience Proven experience in Formal/Functional Verification - Demonstrated execution experience of verification of logic blocks verification. Knowledge of formal me...

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL/Test Pervassive Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high p...

As a Silicon Design Engineer 2 at AMD, you play a crucial role in shaping the next generation of AMD products, including CPUs, GPUs, and adaptive compute engines. Your responsibilities include interfacing with large, globally distributed design teams to support complex and collaborative development efforts. You will drive automation of Synthesis, Place and Route, Logic Eqv, and Functional ECO methodologies targeting advanced technology nodes. Additionally, you will be responsible for developing and automating Synthesize, PnR, and Functional ECO for various designs at advanced technology nodes and scripting out utilities to automate different components of the implementation flow. Your role w...

You will be joining Qualcomm India Private Limited as a Sub-System Hardware Architect specializing in ASIC design for AI within the Engineering Group > Hardware Engineering. Your primary responsibility will be to define and lead the hardware architecture for ASIC components within the Turing subsystem, ensuring they meet performance, reliability, power, and scalability requirements. You should have proven experience in designing ASIC sub-system hardware components for AI applications, strong knowledge of ASIC design tools and methodologies, and excellent problem-solving skills. Your role will involve collaborating with cross-functional teams to define hardware requirements, developing and im...

Experience -3+ years Experience in RTL coding using Verilog Experience on development on Xilinx MPSoC (ZCU 106/104) Hands on experience on Xilinx Vivado and Vitis, experience on Microblaze, experience on security aspects of authentication

Experience Required: Expertise and strong hands-on experience in RTL design using System Verilog or VHDL Digital system architecture, Processor subsystem architecture and block definition Experience working on complex SoCs RTL design quality analysis Lint, CDC, RDC Good understanding of digital design Synthesis, DFT and Static Timing Analysis Basic understanding of mixed-signal designs Experience with gate level simulations and debug Experience in digital verification is a plus Strong written and verbal communication skills Immediate joiners only

We are looking for experienced FPGA Verification Engineer. As a FPGA Verification Engineer, you will work for a high complexity DWDM equipment for LH/ULH applications. You will work in close collaboration with multi location cross-functional R & D teams. Our work includes everything from product concept to finished product - a process that spans over the entire development cycle. The team takes full responsibility for delivery on time with the right quality. As an FPGA Verification engineer, you will be responsible for designing verification plan, developing environment/testbench, creating test scenarios for running simulations, coverage analysis and lab support during board bring up to ensu...

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: FPGA Design engineer Location: Hyderabad Work Type: Onsite Job Type: Full time Job Description: Strong in digital design. Strong in Xilinx Vivado IP & IPI tools till bit-generation. Knowledge of VHDL/Verilog/System Verilog. Knowledge of Validating IP/IP Example designs on Xilinx boards, debugging of failures on target boards, board bring up. Proficiency in Linux environment. Good communication skills. Basic Job Deliverable: RTL coding, IP design, Modify/update existing IP as per requirements. Qualification: Bachelors/Master’s in ECE TekWissen® Group is an equal oppo...

As a Senior Member of Technical Staff (SMTS) Silicon Design Engineer at AMD, you will be an integral part of the Circuit Technology team, focusing on DFT Methodology/Architect/RTL execution for high-speed SERDES Phys, Next-gen Memory Phys, and Die-to-Die interconnect IPs. Your responsibilities will include defining the DFX architecture for high-speed PHYs and die-to-die connectivity IP designs, RTL coding, supporting scan stitching, developing timing constraints, assisting with ATPG, and post-silicon bringup. Join a dynamic team that delivers cutting-edge IPs crucial for every SOC developed by AMD. The ideal candidate possesses strong analytical and problem-solving skills with keen attention...

SR. DFT ENGINEER SmartSoC is looking for expert DFT engineers for the development, support, maintenance, Implementation, and Testing of complex components of an ASIC/SOC/FPGA/Board. Desired Skills and Experience- 3 – 10year’s experience in DFT Good experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan. DFT logic integration and verification. Experience in debugging low coverage and DRC fixes Gate Level ATPG simulation with and without timing. Pattern generation, verification, and delivery to ATE team. Post silicon debug and support on failing patterns. Good experience with tools from Mentor/Synopsis/Cadence. LBIST experience is plus. DFT mode STA and timing closure su...

RTL DESIGN LEAD ENGINEER The ideal candidate will be required to work on both IP development and integration into SoCs catering to various markets and tech nodes. The job will involve RTL design, front-end tools flow, and SoC integration/porting-related tasks. Desired Skills and Experience- 8+ years of Experience Engineering experience with exposure to front end ASIC tool flows Should be self-driven and independent in tracking and closing tasks with respective holders. In depth knowledge of AHB and bus infrastructures like matrix and fabrics Good understanding of ARM based SoC Architecture Exposure to ARM Cortex A/M integration or support Good understanding of SoC DV methodology Good experie...

VERIFICATION LEAD – IP VERIFICATION SmartSoC is looking for a smart and enterprising leader with expert knowledge in IP Verification to come and technically lead a Team. We are looking for someone who is very strong technically and very good at multi-tasking as your role will involve leading 7 to 8 projects at one time. You will be responsible for leading and managing a team, client communication, and project execution. This role will include- Lead an internal IP Verification team, executing projects for an offshore client Be responsible for Test Planning, Environment Architecture and Project Management of Multiple Projects Guide team members in verifying IP’s and delivering zero bug IP’s Ma...

Pre-Silicon Validation Engineer Experience4 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Creating test environments, checker strategies, and test generators for validating embedded power management firmware in the SOC Communicating effectively, coordinating and working with firmware developers and SOC integration teams Potentially participating in the debug of failures in silicon and developing new testing strategies to detect these failures on pre-silicon models Mentoring junior members of the team in their development You should have 3-5 years of experience in the following areas: SoC development, verification, or integration using Verilog/Sys...

1-3 years of experience in RTL DFT Verification (DFx). Good Understanding of JTAG IEEE-1149.1 and IJTAG IEEE P1687 standard. Understanding of using ICL and PDL files for verification and knows to create a testbench. Experience in JTAG RTL verification within any UVM. Able to debug simulation fails effectively utilizing debug tools like Synopsis Verdi. Basics of system Verilog, Basics of UVM, and preferably System Verilog assertions Scripting knowledge of TCL/Perl. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

We are seeking a highly skilled and motivated Mixed Signal Verification Engineer to join our team with 8+ years of expeirence. As a Mixed Signal Verification Engineer, you will be responsible for developing and implementing testbenches, checkers, and tests using System Verilog. You will also play a key role in creating and utilizing real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations. Ownership of Analog/Mixed designs at the chip and/or block level will be an important aspect of this role. Responsibilities: Develop and build Mixed-Signal testbenches, checkers, and tests using System Verilog. Create and utilize real-numbered analog behavioral mode...

Experience: 5 to 12 years Location: Bangalore : We are seeking a highly skilled Design Verification Engineer to join our team in Bangalore. The ideal candidate will have 5 to 12 years of experience in IP and SOC verification, with a strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM). The primary focus of this role will be on Ethernet protocol verification, ranging from 100G to 800G standards. Key Responsibilities: Ethernet Protocol Expertise Demonstrate expertise in Ethernet standards, encompassing 100G to 800G. In-depth knowledge of specific standards, including 100GE (cl45, cl49, CL82, CL91, CL119), 200GE, 400GE (cl161, cl116), and 800GE (802.df/800ETA). P...

Emulation Engineer Experience3 to 5 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: should have emulation experience working on available platforms such as; Palladium, Veloce, or Zebu, as well as experience with compilation, debug, performance, and throughput tuning Experience using Verilog, VHDL design Experience with C/C++ and System Verilog, UVM verification environments Experience writing scripts using Perl, Python, Makefile Debugging experience using tools like waveform, Verdi, Simvision Strong communication skills and ability to work as a team Description You’ll support multiple emulation environments using the latest emulation techniques (C/C++ DP...

We are seeking a skilled and motivated DDR5/SerDes Verification Engineer to join our organization. As a DDR5/SerDes Verification Engineer, you will be responsible for verifying and validating the functionality and performance of DDR5 memory subsystems and high-speed SerDes interfaces. In addition to strong DDR5 and SerDes verification expertise, knowledge and experience with sideband I2C and I3C protocols would be considered a plus. Candidate should have Design and implement advanced verification environments and test benches using SystemVerilog/UVM Experience4-10 Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

Experience Level: 8+ years Location: Bangalore/Hyderabad Skills: Profound expertise in MACSec and Ethernet technologies. MACSec (Media Access Control Security): Proficient in point-to-point security implementation on Ethernet links, adhering to the IEEE 802.1AE-2018 standard. IPsec (Internet Protocol Security): Skilled in establishing security between two devices across an Internet Protocol network. Hands-On Knowledge: Proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM), with practical experience in their application. Testbench Development: Demonstrated experience in developing comprehensive Test Benches (TB) and individual verification components. Communication and...

Job Location: Bengaluru (BLR) and Hyderabad (HYD) Experience: 7 to 20 years : We are seeking a highly skilled and experienced RTL Design Engineer with a strong knowledge of ARM Micro Architecture to join our team. In this role, you will play a key role in the development of complex digital designs and contribute to the success of our cutting-edge projects. The ideal candidate will have a proven track record in RTL design and a deep understanding of ARM Micro Architecture. Key Responsibilities: Collaborate with cross-functional teams to define and develop RTL designs for advanced microprocessor-based projects. Design, implement, and verify digital logic blocks and modules in accordance with p...

Experience: 5 to 12 years Location: Bangalore : We are seeking a highly skilled Design Verification Engineer to join our team in Bangalore. The ideal candidate will have 5 to 12 years of experience in IP and SOC verification and possess a strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM). This role specifically requires expertise in GLS (Gate-Level Simulation). Key Responsibilities: IP and SOC Verification Conduct IP and SOC verification activities to ensure the functionality and correctness of integrated circuits. SystemVerilog (SV) and UVM Proficiency Demonstrate strong knowledge of SystemVerilog and Universal Verification Methodology for efficient and ef...