Design Verification Engineer (Pervasive SoA)

* Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering.* Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment.* Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU.* Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments.* Develop verification test plan for both functional and performance verification including the estimation for coverage closure. * Support higher level core/system simulation environment.* Participate in post silicon lab bring-up and validation of the Hardware.* Lead , guide ,mentor a team of engineers and represent them at global forums.* Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement.* Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members.* Hands-on on Power Management domain Required education Bachelor's Degree Preferred education Bachelor's Degree Required technical and professional expertise 4+ years of experience in Design Verification - demonstrated execution experience of verification of logic blocksStrong in SoC verification Chip reset sequence and initialization for SoAKnowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL)Good programming skills in C/C++, Python/PerlExposure in developing testbench environment, write complex test scenario, debugging and triaging failsHardware debug skills backed by relevant experience on projectsExposure in developing testbench environment, write complex test scenariosGood communication skills and be able to work effectively in a global team environmentDrive verification coverage closure Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , BIST is a plusScripting Expertise backed up relevant experience in the sameWriting Verification test plansFunctional and code coverage analysis and debug