211 Ddr Jobs - Page 3

Let your ideas power the next wave of technology!Were hiring Design Verification Engineers for Bangalore and Hyderabad.Experience Required4"“18 YearsKey Skills: HSIO protocols like PCIe, DDR5, HBM, USB, low-power simulationsWork on cutting-edge verification projects and take your career to new heights. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore IndiaHyderabad

1.DV 2.PD 3.DFT 4.RTL 5.PD(VLCP)/(EMIR) 6.PV 7.STA/Synthesis

Role : ASIC RTL Engineer / Digital Design Location . pan India or Onsite. SoC subsystem/IP design, RTL quality checks (Lint, CDC) If you interested so please share your updated cv at sugrabano@praxists.co.in - 9582126775

The position requires 2-6 years of experience with micro architecture design and system design using Verilog, SV, or VHDL. You should also have experience in Spyglass Lint, CDC, SoC Integration, logic design with Verilog and SV, ASIC Synthesis, STA, timing closure, and working with any Processor based system. Familiarity with design using SoC, AXI/AHB/APB System bus, and peripherals such as Ethernet, PCIe, DDR, USB, UART, SPI, and I2C is essential. You will be responsible for synthesis, timing analysis using various industry standard tools, and should have proficiency in TCL and Python scripting. The ideal candidate for this role should have a notice period of immediate availability to 1 month. The position is based in BLR/Hyd locations.,

Intel is a pioneer in the wireless communication industry, leading with state-of-the-art products that define the benchmarks for performance and innovation. We are in search of a highly proficient SerDes PHY System Engineer to become a part of our team. In this crucial role, you will be entrusted with the design and advancement of physical layer components for high-speed SerDes systems, ensuring their efficiency and dependability. Your key responsibilities will involve leading the design and development of the physical layer for SerDes systems, encompassing transmitter and receiver architectures, equalization techniques, and signal integrity. You will conduct thorough simulations using MATLAB and Python, alongside lab testing, to validate the performance and compliance of the SerDes PHY, optimizing it for high-speed data transmission. Furthermore, you will develop and execute calibration methods to enhance the performance of the SerDes PHY, ensuring top-notch data transmission quality. Collaboration with cross-functional teams, including digital design, hardware, and software, will be essential to ensure seamless integration of the PHY layer into the overall SerDes system. Maintaining detailed documentation of design specifications, test plans, and results, addressing and resolving intricate technical issues, implementing quality control measures, and best practices will also be part of your responsibilities. Qualifications: - Bachelor's degree in Electrical Engineering; a Master's degree in a relevant field is preferred. - Minimum of 5 years of experience in wired or wireless communication systems. - Proven enthusiasm and experience for lab work, collaboration, and solution development. - Prior experience in DDR/PCI/GDDR7/UCI will be advantageous. - Proficiency in scripting and programming languages such as C, C#, MATLAB, and Python. - Experience in silicon development and SerDes technologies is beneficial. - Strong problem-solving abilities and analytical skills. - Self-motivated and capable of executing tasks in uncertain environments. - Demonstrated leadership skills and ability to drive initiatives in a matrix organization. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Join us in our journey to deliver purposeful computing experiences that unlock people's potential, allowing them to focus, create, and connect in ways that matter most. As a part of the Client Computing Group (CCG), you will be contributing to driving business strategy and product development for Intel's PC products and platforms. This includes a wide range of form factors such as notebooks, desktops, 2 in 1s, and all in ones. Together with our industry partners, we are committed to designing the PC experience more deliberately, including delivering a predictable cadence of leadership products. By investing more heavily in the PC, we aim to fuel innovation across Intel and enrich the lives of every person on earth. This role will require an on-site presence. Job posting details, such as work model, location, or time type, are subject to change.,

As an Embedded Software Developer, you will be responsible for designing, developing, and optimizing embedded and system-level applications using C/C++ in Linux. Your role will involve implementing efficient data structures to enhance system scalability and throughput and developing robust Socket Programming interfaces for secure inter-process communication across distributed systems. You will be building multi-threaded applications that meet real-time performance requirements and developing on DEOS for high-reliability applications. Collaboration with cross-functional teams to deliver platform-specific solutions across diverse hardware setups will be a key aspect of your job. Additionally, you will design and implement graphical user interfaces (GUIs) using QT for embedded or desktop applications. Conducting unit testing, debugging, and performance analysis to address issues early in the development cycle will also be part of your responsibilities. Your qualifications will include a Bachelors or Masters degree in Computer Science, Electronics, or a related field, along with 9-10 years of hands-on experience in embedded software development. Strong proficiency in C/C++ for embedded platforms, experience with microcontrollers and real-time systems, and knowledge of peripherals such as UART, SPI, QSPI, I2C, and DDR are essential for this role. You should have a background in unit, integration, and system-level testing in embedded projects, experience with Ethernet network development and protocols, and familiarity with CI/CD tools like Bamboo and Jenkins. Experience with Linux Kernel, FreeRTOS, Yocto, Xilinx SDK, and CMake build systems, as well as proficiency in Python for scripting and automation, are required. Excellent communication skills, both written and verbal, are essential for collaborating effectively with team members. It would be beneficial to have experience with GitHub, JIRA, Confluence for version control and agile collaboration, Docker for containerized development environments, and an understanding of Secure Bootloaders, Application Encryption, and Code Signing. Experience in Data Distribution Service (DDS)-based systems is a plus. In this role, you will troubleshoot system-level issues in distributed, multi-threaded environments, participate in code reviews, and ensure adherence to best coding standards and practices. Your expertise will contribute to the successful development of embedded software solutions that meet high-performance and reliability requirements.,

The Embedded Software Developer position in Hyderabad requires a strong proficiency in C/C++ programming for embedded systems. The ideal candidate should have proven experience working with microcontrollers in real-time systems and possess expertise in developing unit, integration, and system-level tests for embedded engineering projects. Additionally, experience in working with peripherals like UART, SPI, QSPI, I2C, and DDR is essential for this role. The candidate should have a deep understanding of Ethernet network development and experience in CI/CD pipelines using tools like Bamboo and Jenkins. Knowledge and experience with Linux Kernel and/or FreeRTOS are desired. Advanced knowledge of Linux, Yocto, XILINX SDK, CMake Build system, and Python is also required for this role. Exceptional written and verbal communication skills are crucial for effective collaboration within the team. If you have a passion for software development and possess the desired skills mentioned above, we encourage you to apply for this exciting opportunity.,

DDR and LPDDR design and analysis High speed serial IO design and analysis, PCIE, USB, UFS, CSI/DSI/MIPI Power Integrity analysis SI/PI tools: Ansys HFSS/SIwave, Cadence/Sigrity, Keysight ADS, HSPICE Spreadsheets and similar productivity tools Mentor or Cadence board design tools

Hiring Design Verification Engineers for Bangalore location. Exp: 5+ Years Company: Eximietas Design Job Area: Engineering Group, Engineering Group > Hardware Engineering. Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains. Our success is anchored in the unparalleled expertise of our engineering leadership team, whose collective experience spans renowned tech giants like Google, Cisco, Microsoft, Oracle, Uber, Broadcom, and Sun. With a commitment to innovation and excellence, we deliver cutting edge solutions that empower businesses to thrive in the ever-evolving digital landscape. Minimum Qualifications: 5+ years of Design verification experience. Strong understanding of design concepts and ASIC flow Prior work experience on IP, Subsystem and Soc verification. Strong SV/UVM coding skills. Strong understanding of RAL Hands-on experience on third party VIP Integration. Strong solving , analytical and debugging skills. Strong understanding of AMBA protocols like generic AXI, APB, AHB Hands on verification experience in Low speed peripherals like, I2C, SPI, QSPI, DMA, Interrupt controller, GPIO, UART Hands on verification experience in any of the high-speed protocol like PCIE, CXL, Ethernet or USB Hands on experience in any of the memory protocols like DDR, LPDDR or HBM Hand on experience with verification tools such as VCS, Xcelium, Waveform analyzer and third-party VIP integration. Hands on experience with revision control flow like Git, SVN, Perforce Hands on experience withGLS and Power aware simulation (UPF) Experience in a team lead role, including guiding and mentoring team members, and ensuring effective collaboration and communication within the team. As a Senior verification engineer candidate will be responsible to work at IP, Subsystem or SoC verification related tasks. Responsibilities: Develop testbench components (Driver, Monitor, Scoreboard) from scratch or enhance an existing testbench for a given IP, Subsystem, or SOC. Understand design specifications and implementation to define the verification strategy. Create testbench micro-architecture, test plan, and coverage plan documents. Define the verification scope, develop test plans and tests, and establish the verification infrastructure to ensure design correctness. Implement SystemVerilog assertions and functional coverage. Analyze code coverage and address missing scenarios to meet coverage goals. Work with other verification team members to develop, execute, and analyze verification test cases and sequences, providing relevant solutions to issues. Collaborate with architects, designers, and pre- and post-silicon verification teams to meet deadlines. Coordinate with customer leads, ensuring all deliverables and timelines are met. Serve as the project's point of contact, responsible for verification signoff.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. BDC Post Silicon Engineering group has an opening for a Digital Bench characterization Engineer. This group develops Test solutions for Design verification of Highly integrated SOCs (System on Chip) designed by Qualcomm. We work with Design, System, Program Management, Yield, Reliability and Manufacturing teams to Test, support and commercialize Qualcomms products. As part of the Post Silicon Engineering group, you will be responsible for developing Test strategy & executing Bench characterization for leading edge LPDDR & PCDDR Subsystem components (DRAM, DRAM Controller, DRAM PHY, IOs, PLL/DLL, clocking architecture, Delay circuits, Power Distribution Network) and High-Speed IO interfaces (PCIe, USB2/3, Display Port, HDMI, MIPI-CSI/DSI, UFS & PLL). You will drive first Silicon debug, qualify semiconductor fabrication process, evaluate parametric performance of DDR & High-Speed IO IPs and perform failure analysis to root-cause a design problem. You with be working with IC design engineering, system engineering and Hardware applications engineering teams across the globe in a time critical environment. Education Requirements MTech, BTech or Equivalent in Electronics or Electrical Engineering with 1-3 years of related work experience Skills/Experience: Solid understanding of Electronics engineering fundamentals, DDR & High-Speed IO circuit analysis techniques and Semiconductor manufacturing process, Good understanding of Test and characterization methodology of DDR and High-Speed IO interfaces In-depth understanding of Mobile & PC DDR 2/3/4 protocol, timing diagrams, HSIO IPs PHY level understanding and Electrical parametric compliance specifications (eye diagram, differential signaling, jitter analysis, Receiver-Jitter-Tolerance, signal integrity, transmission line considerations, de-embedding). Hands-on experience using Bench instruments such as oscilloscopes, J-BERT, network / spectrum analyzers, signal generators and Logic analyzers is a must. Solid software skills for writing and debugging Test code using C, C# or Python. LabView knowledge is a plus. Using CAD software such as Mentor Graphics DA or Cadence Allegro is a plus. Ability to work effectively in a fast-paced environment with strong verbal and written communication skills. Keywords DDR, High-Speed IO, Electrical Spec compliance, Eye Diagram, Jitter, C, C#, Python, LabVIEW Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Systems Engineer, you will research, design, develop, simulate, and/or validate systems-level software, hardware, architecture, algorithms, and solutions that enables the development of cutting-edge technology. Qualcomm Systems Engineers collaborate across functional teams to meet and exceed system-level requirements and standards. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. You will be part of Automotive System Performance team that is responsible for optimizing the Multimedia performance on Snapdragon Automotive chipsets. The Candidate should have at least 6-8 years of experience on Multimedia technologies comprising of Camera, Video, Graphics, and Display technologies. The candidate should be proficient in Android/Linux kernel fundamentals, Debug tools, fundamentals of interconnects, System QoS, Bus protocols and performance Monitoring. The Candidate should have the following requirements At least 6-8 years of embedded domain experience in Multimedia Hardware architecture and device driver development. Proficient in hardware fundamentals of display/Video/Camera basics, DDR, SMMU, NOC and system interconnects, AXI/AHB Bus protocols and hardware Performance Monitoring systems. Good understanding of Auto/Mobile SoC architectures and Multimedia Subsystems hardware data flows. Basics of Arm processor architecture, Multicore/Multiprocessor with SMP/heterogenous cores. Expertise in C programming language on an embedded platform is a must. Operating systems/RTOS/Linux kernel internals, scheduling policies, locking mechanism, MMU/paging etc. Prior working experience in IP hardware functional and performance validation in silicon and or emulation, preferably in Multimedia domain viz. camera, Video, Display, GPU and Audio. Familiar with Android System tools, Debug tools, JTAG, scripting etc. \ Passion in debugging system level issues, working with teams across geographies and partnering with cross functional teams towards meeting project milestones. Exposure to working on emulation/pre-si environment is added advantage. Responsibilities The candidate is expected to assume all responsibilities towards project execution. With good understanding of SoC Multimedia cores, candidate should be able to support activities related to System use cases profiling and optimization. The candidate will be responsible for understanding the HW setups in the lab and carrying out the performance tests. Education Requirements RequiredBachelor's, Computer Engineering and/or Computer Science and/or Electrical Engineering PreferredMaster's, Computer Engineering and/or Computer Science and/or Electrical Engineering Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: Job Overview Qualcomm is leveraging its core strengths in wireless and compute technologies to lead a significant technological revolution in the automotive space. Having pioneered connected car technologies for over a decade, Qualcomm is now at the forefront of evolving Automotive Infotainment, Telematics, ADAS/Autonomous Driving, and supporting technologies. We are investing in cutting-edge technologies such as 5G, Cellular V2X, Computer Vision, and AI/Deep Learning, and are collaborating closely with global automakers, Tier-1 suppliers, standards bodies, consortiums, and operators to push the boundaries of innovation. The Qualcomm Automotive Infotainment Team is seeking a Display Architect who can make a significant impact in the automotive space and join our growing multisite engineering organization. Responsibilities Lead the design and implementation of display processing pipelines on Qualcomm's Autonomous/ADAS SoCs and platforms. Architect and develop the next-generation display stack, ensuring robust system-level integration and performance. Collaborate closely with product owners and domain/technology experts to define specifications, lead software design/implementation, and integrate/validate software in a larger system. Own the complete display driver stack development from requirements to design, development, and bug fixing. Actively engage with Automotive OEMs, Tier-1s, and ISVs to implement solutions based on Qualcomm Automotive platforms. Design complex fault-tolerant safety systems and ensure compliance with industry-standard specifications (e.g., ISO26262, ASPICE). Optimize display performance, power consumption, and system-level integration. Minimum Qualifications 13-16 years of experience in the embedded domain, designing, developing, and supporting software solutions on multi-core ARM/CPUs. Strong C/C++ programming skills. Extensive experience with embedded platforms, including low-level firmware, kernel, and user-space components. Expertise in designing and developing software for heterogeneous compute platforms consisting of ARMs, GPUs, DSPs, and specialized hardware accelerators in embedded SoC systems with J-TAG or ICE debuggers. Proven experience in end-to-end display stack development for embedded products. Solid understanding of operating systems, system-level architecture, and low-level software/hardware interface design. Preferred Qualifications Motivated self-starter with excellent verbal and written communication skills. Demonstrated ability to work with engineers, partners, and customers across different geographies. Experience working with senior management in a corporate environment. Expertise in display interface standards such as HDMI, DSI, LVDS, eDP, and FDPLINK3. Working knowledge of the Android/Linux kernel with respect to DRM/KMS/FB drivers. Thorough understanding of the Android Display/GFX architecture and display native services and framework, including multi-display. Experience with SurfaceFlinger/Wayland compositors is a plus. Educational Requirements Bachelor's or Master's Degree in Engineering from a reputed institute. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. 3+ years of work experience with Programming Language such as C, C++, Java, Python, etc. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Experience2 to 4 years The candidate should have good understanding of analog and mixed signal circuits with experience in high-speed links such as DDR PHY and/or Serdes Experience with high-speed digital circuits, memories and lab. testing is desirable Experience with Tx/Rx equalization techniques and circuits like de-emphasis, CTLE, DFE is desirable Knowledge of DDR protocols is desirable Ability to work in a dynamic environment and interact well with cross-functional teams such as design, boards, ATE etc. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Overview We are looking to hire a strong DV engineer to work on verification of LPDDR/DDR based IPs and Subsystems in the Infra IP team Create DV infrastructure for verification Integrate VIP's Create and execute test plans, debug failures, write assertions, close code and functional coverage Ensure high quality verification Working with all stakeholders to ensure program success Minimum Qualifications Bachelor's degree in Engineering, Electronics, Information Systems, Computer Science, or related field. 4+ years Hardware Engineering experience or related work experience. Preferred Qualifications Following skill set is required: Strong Debug, UVM, System Verilog Understanding Specs and Standards and developing relevant test plans Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening Preferred Qualifications 4+ Year of industry experiences in the following areas- Thorough understanding of Digital design concepts Thorough understanding dv methodologies and tools Good understanding of DDR/LPDDR families (LP/PC) and generations (DDR2/3/4/5) Understanding of Bus protocols like AHB/AXI/ACE/ACE-Lite Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Exp : 3- 5 Yrs Position : Senior or Lead Expertise : Power fundamentals Good knowledge of PTPX Good knowledge of CLP Knowledge of design verification, RTL coding, synthesis, and physical design Protocol knowledge of , DDR, CHI, Cache, computer organization, bus protocol, Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: Exp:- 8-15 years ( B.Tech / M.Tech from ECE / EEE /E&I/ CSE / IT Background and relevant experience in Embedded system and DDR domain) Note :- We are looking for candidates who has relevant work experience in DDR technology( memory controllers, PHY and DRAMs), Firmware and SW driver development/ Platform driver development / Board Bring upOR If candidate has very strong debugging expertise in system level issues like Bit flip , memory corruption , cache corruption , CPU Hang etc. DesirableDDR technology (Relevant work exp in DDR SW driver required ) or Platform driver development / Board Bring up Opportunity: Debug and Development of DDR init & run time driver sequences.Will be working on state-of-the-art DDR technology LP4x/LP5x.Opportunity to get the understanding of DDR technology.Will be responsible for driving multiple programs. Need to work on issues with multiple teams (performance, Phy, controller design etc.)Need to analyze lot of data and need to recognize patterns.Working on triage of the DDR issues.Test case enhancements and development Job description Minimum Qualifications The charter of the CoreBSP-DDR SW System team is to ensure that the end-product qualifies the defined acceptance criteria for DDR by meeting stability, Power, and Performance Goals. The team is looking for a candidate who has strong understating of system level test methodologies and runs validations on mobile systems. The position involves Understanding of SOC Architecture and DDR SW Systems, identifying and debugging DDR systems issues (memory corruptions, Memory Lockups, Bit flips, memory leaks etc..) reported by memory validation and running system level validations tests. The engineer would have the opportunity to interact with different SW & HW teams to understand DDR systems. The candidate is expected to own and drive multiple chipsets in the DDR tech area. This position gives an exposure to understanding various quality stages from product development to commercial launch of the product. Skills: C, Python, Embedded system, JTAG, processor architecture, RTOS operating system, core BSP driver level development and debug, CPU architecture, SOC System knowledge. Desirablein DDR technology (memory controllers, PHY and DRAMs), Firmware and SW driver development / Platform Driver Development / Board Bring up Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. 3+ years of work experience with Programming Language such as C, C++, Java, Python, etc. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

SE NIOR SILICON DESIGN ENGINEER THE ROLE : We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor , you will be part of a leading team to drive and improve AMDs abilities to deliver the highest quality, industry-leading technologies to market. The V erification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/ time zone s . You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Job Description: The verification team is looking for a Senior Design Verification Engineer to contribute on the verification of Network on Chip IPs, Subsystems having adequate knowledgeble on the boot flow. The individual will help architect, develop and use simulation and/or formal based verification environments, at block, subystem , Fulchip level, to prove the functional correctness of Network-On-Chip (NOC) IPs, subsystem and SOC designs. Responsibilities: Plan verification of complex digital design blocks by fully understanding the architecture and design specification Interact with architects and design engineers to create a comprehensive verification testplan Design and architect testbenches in System Verilog and UVM to complete verification of the design in an efficient manner Create and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools Debug tests with design engineers to deliver functionally correct design blocks Identify and write coverage measures for stimulus quality improvements Perform coverage analysis to identify verification holes and achieve closure on coverage metrics General requirements: Experienced with development of UVM, OVM, VMM and/or System Verilog, Verilog test benches and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test block level/full chip SOCs and FPGAs Strong understanding of state of the art of verification techniques, including assertion and coverage-driven verification Strong understanding of different phases of ASIC and/or full custom chip development is required Experience in block level NOC (Network on Chip) verification is a plus Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high performance FPGAs, SOCs and/or VLSI designs is a plus Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management is a plus Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (VC-Formal, Magellan) is a plus Special Requirements : Architect and implement verification environment using advanced verification methodology such as UVM or SystemVerilog; Test plan development and test writing; Analyzing and debugging failures using simulation tools such as Synopsys VCS or DVE to verify hard IPs, FPGA fabric or System-on-Chip; Functional coverage writing, coverage collection and analysis, coverage closure; Writing System Verilog assertions and assertion based verification; and, Running regressions, automation using scripting languages such as PERL and verification closure Education Requirements: Masters / B.Tech / M.Tech Years of Experience : 5+ Years #LI-SG

At Cadence, we are looking for individuals who are passionate about technology and aspire to lead and innovate in the industry. Your responsibilities will include understanding and reviewing design specifications, developing verification strategies, test plans, and coverage plans. Additionally, you will be tasked with creating constrained random verification environments, verification components, writing tests, sequences, functional coverage, and assertions to achieve verification goals. Furthermore, you will be developing C-based test cases for SOC verification. To excel in this role, you should have a strong background in functional verification fundamentals, environment planning, test plan generation, and environment development. Proficiency in System Verilog and experience with UVM based functional verification environment development are required. Knowledge of verilog, vhdl, C, C++, Perl, and Python is essential. Expertise in AMBA protocols such as AXI, AHB, and APB is a must, along with familiarity with USB, PCIE, Ethernet, DDR, LPDDR, or similar protocols. Proficiency in version control and load sharing software is also necessary. Desirable skills and experience include prior experience with Cadence tools and flows, familiarity with ARM/CPU architectures, experience in developing C-based test cases for SOC verification, some exposure to assembly language programming, and knowledge of protocols like UART, I2C, SPI, and JTAG. Embedded C code development and debug, as well as formal verification experience, would be advantageous. Strong communication, organizational, planning, and presentation skills are crucial for success in this role. You should be able to work independently, deliver high-quality results in a fast-paced environment, and be open to learning new methodologies, languages, and protocols. Personal development and growth are essential to meet the evolving demands of the semiconductor industry. A self-motivated mindset and willingness to take on additional responsibilities to contribute to the team's success are highly valued. Join us at Cadence, where we tackle challenges that others cannot. Let's make a difference together.,

As a PHY Hardening Engineer at Ampere, you will play a pivotal role in the development of cutting-edge expertise in high-speed digital design. You will collaborate with various teams including architects, RTL designers, packaging and PCB design teams, and post-silicon validation groups to optimize layouts, ensure signal and power integrity, and perform chip-level physical design tasks. Your expertise in managing high-speed signals and advanced packaging techniques will be crucial in delivering reliable designs that meet timing, power, and manufacturability requirements. The ideal candidate for this role is a self-motivated individual with a Bachelor's degree and 8 years of related experience or a Master's degree and 6 years of related experience. You should have a strong background in floor planning, bump planning, routing, power grid design, clock design/distribution, and optimization for high-speed digital circuits. Experience in developing high-speed digital layouts, handling chip assembly, and using EDA tools for chip-level physical verification is essential. Additionally, familiarity with signal and power integrity concepts, advanced packaging technologies, and DFT structures will be advantageous. In return, Ampere offers a comprehensive benefits package including premium medical, dental, and vision insurance, parental benefits, retirement plans, and generous paid time off. You will also enjoy fully catered lunches, healthy snacks, and energizing beverages in the office. At Ampere, we nurture an inclusive culture that encourages personal and professional growth, empowering employees to innovate and contribute to a more sustainable future through industry-leading cloud-native designs. Join us at Ampere and be part of our journey to invent the future of computing.,

As a Systems Architecture Lead, you will be responsible for the development of systems and product architecture for advanced Application Processors. Your role will involve collaborating with hardware engineering, software engineering, and application/solutions engineering teams to create scalable and robust solutions that cater to the requirements of advanced microprocessor products in Industrial, IOT, and Automotive Edge markets. A deep technical understanding of MPU hardware and software architecture, Solutions Engineering, Use Case Analysis, Validation, Optimization, and system integration is crucial for this position. Key Responsibilities: - Drive the definition and development of MPU architecture in alignment with market trends and industry standards. - Collaborate with product marketing teams and customers to translate requirements into detailed specifications. - Define and document use cases for the product. - Design efficient computing architectures, including multi-core processing, high-end CPU, DSP, Vision processing, Machine Learning, and memory hierarchy. - Integrate security mechanisms like secure boot, cryptographic accelerators, and trusted execution environments. - Ensure seamless system-level integration of MPU product components by collaborating with hardware, firmware, software, and solutions/application engineering teams. - Conduct power and performance benchmarking, analysis, and optimization. - Develop strategies to optimize performance, energy efficiency, and thermal management while ensuring reliability and scalability. - Own key performance indicators for programs and drive optimization. - Define architectural guidelines, best practices, and documentation to guide product development teams. Required Qualifications: - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with 15 years or more relevant experience. - Proficiency in use-case analysis and decomposition. - Experience with Linux, Zephyr, Free RTOS, or similar operating systems. - Strong understanding of microprocessor and microcontroller architectures, including CPU cores, DSP, memory management, and peripheral integration. - Experience in system-level performance optimization, low-power design, SW/HW co-design, and real-time processing. - Familiarity with high-speed interconnects, memory architectures, DDR, PCIe, and bus protocols. - Excellent collaboration skills to work across multidisciplinary teams. - Experience in product development processes. Preferred Qualifications: - Experience with ARM Cortex and/or RISC-V architecture. - Experience with media processing, vision and imaging applications. - Proficiency in system-level simulation tools, hardware/software co-design, and debugging techniques. - Familiarity with Machine Learning Hardware IPs, tools, and architecture. - Knowledge of functional safety and security standards. - Familiarity with Wi-Fi integration, networking protocols, and secure wireless communication.,

As a Senior Engineer, Signal Integrity at Micron Technology, you will be part of the inclusive culture that drives the innovation of memory and storage solutions. Your role within the Signal Integrity Research and Development (SI R&D) group will involve supporting various product developments, including DRAM, LPDRAM, NAND, CXL, LPCAMM, DIMM modules, and SSDs across different business sectors. Your responsibilities will include analysis of end-to-end systems solutions, circuit level IO and Power Distribution, integrated circuit packages, printed circuit boards, and measurements to ensure optimal Signal Integrity (SI) and power integrity (PI) performance for Micron's memory solutions. Working within the Signal Integrity team, you will be tasked with various aspects of SI and PI for high-speed interfaces, including modeling at silicon, package, and board levels, time and frequency domain analysis, electrical performance evaluation, and correlation to measurements for different products. You will collaborate with global teams for the development and optimization of methodologies, represent the SI R&D team in cross-functional groups, and integrate with various departments to ensure overall product performance. Successful candidates for this position will possess a Bachelor's or Master's degree in Electrical/Electronics Engineering with 4-8 years of experience. You should have a strong background in SI/PI/EMI theory and application, modeling, analysis, simulation, and a deep understanding of electromagnetic and transmission line theory. Experience with E.M. field solvers, simulation tools, and lab equipment is required. Additionally, familiarity with statistical analysis tools and experience in high-speed interface design and analysis are beneficial. The ideal candidate will be proactive in identifying gaps and opportunities, collaborate effectively with global teams and customers, and communicate complex issues and solutions clearly in both written and verbal formats. If you are ambitious, possess strong problem-solving skills, and enjoy taking ownership of projects, this role at Micron Technology may be the perfect fit for you. Micron Technology, Inc. is a leading industry player in memory and storage solutions, committed to transforming how information enriches life for all. With a focus on technology leadership and operational excellence, Micron delivers high-performance DRAM, NAND, and NOR memory and storage products that power innovations in artificial intelligence and 5G applications. For more information about Micron Technology and potential career opportunities, please visit micron.com/careers. If you require assistance during the application process or need reasonable accommodations, please contact hrsupport_india@micron.com. Micron strictly prohibits the use of child labor and adheres to all applicable labor laws and standards.,

Qualcomm India Private Limited is a leading technology innovator that is dedicated to pushing the boundaries of what's possible, enabling next-generation experiences, and driving digital transformation to create a smarter, connected future for all. As a Qualcomm Hardware Engineer, your role will involve planning, designing, optimizing, verifying, and testing electronic systems. You will be responsible for bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaboration with cross-functional teams will be essential to develop solutions that meet performance requirements. To be considered for this role, you should hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field along with 3+ years of Hardware Engineering or related work experience. Alternatively, a Master's degree with 2+ years of experience or a PhD with 1+ year of experience in a relevant field will also be considered. The BDC Post Silicon Engineering group at Qualcomm has an exciting opening for a Digital Bench Characterization Engineer. This group is responsible for developing test solutions for the design verification of highly integrated SOCs (System on Chip) designed by Qualcomm. As part of this group, you will play a key role in developing test strategies and executing bench characterizations for leading-edge LPDDR & PCDDR Subsystem components and High-Speed IO interfaces. Your responsibilities will include driving first silicon debug, qualifying semiconductor fabrication processes, evaluating parametric performance, and performing failure analysis. The ideal candidate for this role should have an MTech, BTech, or equivalent in Electronics or Electrical Engineering with 1-3 years of related work experience. You should possess a solid understanding of Electronics engineering fundamentals, DDR & High-Speed IO circuit analysis techniques, semiconductor manufacturing processes, and test and characterization methodology of DDR and High-Speed IO interfaces. Hands-on experience with bench instruments and software skills for writing and debugging test code will be essential, along with the ability to work effectively in a fast-paced environment. In this role, you will collaborate with IC design engineering, system engineering, and hardware applications engineering teams globally. Strong verbal and written communication skills are crucial for success in this dynamic and time-critical environment. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, please reach out to disability-accommodations@qualcomm.com. For more information about this role, contact Qualcomm Careers.,

Job Description: We are looking for skilled Design Verification Engineers with 5-10 years of strong experience in the semiconductor domain. Ideal candidates will have hands-on experience in SystemVerilog (SV) and UVM , along with a solid understanding of SoC/IP level verification , GLS , and CPU verification . Key Skills Required: SystemVerilog (SV) UVM (Universal Verification Methodology) SoC/IP Level Verification GLS (Gate-Level Simulation) CPU/Sub-system Verification High-speed interface protocols: PCIe, DDR, Ethernet Requirements: Immediate to 30 days joiners only Willing to work from office (Bengaluru or Hyderabad) Strong debugging and problem-solving skills Excellent communication and team collaboration abilities

Strong in digital design. Skills in ASIC/FPGA verification(directed test or SV/UVM) A good knowledge of simulation flow. Good scripting knowledge Perl/python Apply &Share your Resume to mansoor@hisoltech.com

Job Summary We are looking for highly skilled and efficient engineer to join our System Power, Thermal and Performance team. The candidate will have hands-on experience in executing CPU, GPU, and AI/ML workloads on Android and Windows platforms, o with a strong understanding of SoC subsystems and performance/power KPIs. This role involves system validation, power and performance measurements and optimization, automation, data analysis and handling lab equipment Key Responsibilities Execute and analyze CPU/GPU/AI-ML workloads and benchmarks on Android and Windows platforms Run and interpret power, thermal and performance KPIs from CPU/GPU synthetic workloads and system benchmarks. Execute and collect power and performance KPIs from MLPerf, GenAI models, Vision workloads Collect logs and profiling data from different SoC subsystems (CPU, NPU, DDR, etc.). Monitor and evaluate power and performance KPIs for dashboard generation and reporting. Develop and maintain automation scripts using Python, Shell, or Batch for data collection, parsing, and report generation. Operate lab equipment such as oscilloscopes, power analyzers, and other tools.