2759 Verilog Jobs - Page 14

As a Senior Silicon Design Engineer (SMTS) at AMD, you will be an integral part of the GFX sub-system (Graphics Power Management) verification team. Your role will involve collaborating with lead architects and block design teams to understand the features to be implemented and verified. You will be responsible for developing robust test plans for both synthetic and real workload trace, debugging verification test failures, and ensuring that the design meets functional, performance, and power expectations. To excel in this role, you must have a strong background in ASIC design and be proficient in debugging Verilog RTL code using simulation/emulation tools. Your analytical thinking and problem-solving skills, attention to detail, and ability to work effectively with diverse teams will be crucial for success. Additionally, having good English communication skills, both verbal and written, is essential. Preferred qualifications for this position include a minimum of 12 years of experience in ASIC verification, proficiency in Verilog, System Verilog, UVM methodologies, and C/C++ programming. A solid academic background with a B.E/B.Tech or M.E/M.Tech degree in ECE/Electrical Engineering/Computer Engineering with Digital Systems/VLSI as a major is required. Candidates with graphics pipeline experience and deep knowledge of computer architecture will be given preference. Being a self-starter who can independently drive tasks to completion, while also possessing strong teamwork and interpersonal skills, is essential for this role. This position is based in Hyderabad, India. If you are looking to be part of a dynamic team that is dedicated to pushing the limits of innovation and solving the world's most important challenges, then AMD is the place for you. Join us in advancing technology and making a meaningful impact in the industry, communities, and the world.,

You are an experienced RTL/FPGA Design Engineer with a minimum of 3 - 7 years of experience in the VLSI domain. You hold a BE/B.Tech degree in Electronics/Electronics & Communication or ME/M.Tech in Electronics/VLSI Design or a closely related field from a recognized university with a strong academic background. Your role will be based in Ahmedabad or Bangalore. In this role, you will be responsible for RTL programming using Verilog/System Verilog or VHDL, possessing knowledge of the complete FPGA Design Development flow. You should be proficient with FPGA Development Tools such as Quartus, Modelsim, Vivado, Xilinx ISE, Libero, etc. Additionally, you will engage in functional verification using Verilog/System Verilog or VHDL, optimize RTL code to meet timings and on-chip resources, and support all phases of FPGA-based product development activities. System Architecture Design, testing, and troubleshooting of hardware will also be part of your responsibilities. To excel in this position, you must have experience with Verilog/SystemVerilog or VHDL for design and verification, along with a deep understanding of FPGA design flow/methodology, IP integration, and design collateral. You should be capable of developing small IP blocks from scratch and conducting basic functional verification. Familiarity with protocols like SPI, I2C, UART, and AXI, as well as knowledge of Altera Quartus II Tool, Questasim, Modelsim, Xilinx tools like ISE and Vivado, and Microsemi tools like Libero, are essential. Understanding of USB, Ethernet, and external memories such as DDR, QDR RAM, and QSPI-NOR based Flash is also required. In terms of personal competencies, you should be self-motivated to learn and contribute, able to work effectively with global teams, and willing to collaborate in a team-oriented environment. Prioritization and execution of tasks to achieve goals in a fast-paced environment, along with strong problem-solving skills, are valuable assets. Your passion for writing clean and neat code that aligns with coding guidelines will be highly appreciated. If you meet these qualifications and are excited about the opportunity to work in the VLSI domain as an RTL/FPGA Design Engineer, we encourage you to apply now.,

As a RTL Design Engineer for DDR Memory Controller IP development team at Cadence, your primary responsibility will be to design and support the RTL of the DDR Memory Controller solution. You will be working with the existing RTL, adding new features, and ensuring that all leading DDR memory protocols, including DDR4/LPDDR4, are supported. Your tasks will also involve ensuring customer configurations are clean as part of verification regressions, providing customer support, and ensuring the design meets LINT and CDC design guidelines. To qualify for this position, you should have a BE/B.Tech/ME/M.Tech degree in Electrical/Electronics/VLSI and proven experience as a design and verification engineer, with a significant focus on RTL design and development. Proficiency in RTL Design using Verilog is essential, and familiarity with System Verilog and experience in using/debugging in a UVM based environment are required. AXI3/4 experience is preferred, and prior experience with DDR Memory controller and protocols is highly advantageous. Additionally, having prior experience in RTL design and implementation of complex protocols and working in IP development teams will be beneficial for this role. At Cadence, we are committed to making an impact on the world of technology by hiring and developing leaders and innovators like you. Join us in our mission to solve challenges that others can't and be part of a team that is dedicated to work that matters.,

Required Details Total Experience Relevant Experience Current Company Current Designation: Current CTC Expected CTC Notice Period Current Location Expected Location: Offer In Hand PAN Number (upload profiles to the portal): DOB (upload Profiles To The Portal) Reason for Job Change: Degree CGPA University Passed Out: Out Of 5 Rate Yourself Location: Mumbai—locals only. Budget: Open Competitive Market rate [always keep it low] Interview Mode: 1st Round -Virtual, 2nd/3rd -compulsory face to face, may have more than 3 rounds. Excellent technical skills in Strong Core Java High performance messaging Multi-threading, memory management Networking (TCP/UDP) Performance optimization Gitlab CI – Continuous Integration Experience of Trading System Development and/or Complex Event Processing Deep understanding of multithreading, NIO, concurrency, lock-free data structures, and GC tuning Strong Knowledge of messaging systems like Kafka, Aeron, Chronicle Queue (nice to have) Understanding of memory management, multi-threading - concurrency and synchronization. Experience with memory-mapped files, off-heap storage, or zero-copy I/O Very detail oriented with excellent analytical skills Strong communication & leadership skills Highly proactive and takes initiative to identify problem areas and evolve solutions. Exposure to C, C++, FPGA/Verilog would be a plus

Job Summary We are seeking an experienced and innovative Senior Electronics Design Engineer to lead the development of mission-critical hardware for defense and aerospace applications. This role demands deep expertise in digital, analog, and mixed-signal circuit design with a strong emphasis on reliability, ruggedization, and MIL-STD compliance. The ideal candidate will contribute to system architecture, hardware design, validation, and documentation throughout the product lifecycle. Key Responsibilities  Lead the design and development of high-reliability electronic systems for military-grade products (radios, radar systems, control units, RF front-ends, etc.)  Develop schematics and PCB layouts for analog/digital/mixed-signal systems using industry-standard EDA tools  Perform worst-case analysis, signal integrity, thermal and EMI/EMC analysis to ensure compliance with MIL-STD  Design and validate interfaces  Collaborate with firmware, FPGA, RF, and mechanical teams for integrated system design  Guide junior engineers and conduct design reviews, technical audits, and peer validations  Support environmental qualification  Develop comprehensive documentation required for defense contracts and compliance  Interface with procurement, manufacturing, and quality teams to ensure producibility and lifecycle sustainment  Ensure design traceability and configuration control in accordance with ISO Standards Required Qualifications  Bachelor’s or Master’s degree in Electronics/Electrical Engineering or related discipline  8+ years of hands-on experience in electronics design, preferably in defense or aerospace domain  Strong foundation in analog, digital, power, and mixed-signal electronics  In-depth experience with high-reliability components, thermal design, and redundancy  Familiarity with MIL standards and environmental requirements for rugged systems  Experience in leading hardware development through full product lifecycle  Expertise with lab instruments (oscilloscopes, spectrum analyzers, VNA, etc.) Preferred Skills  Knowledge in Embedded system design  Knowledge of secure hardware design  Experience with FPGA interfacing, high-speed ADC/DAC integration  Working knowledge of VHDL/Verilog and embedded C/C++ for board bring-up  Familiarity with PLM  Background in satellite communication, EW, SDR, avionics, or secure communication systems  Active or eligible for security clearance Personal Attributes  Strategic and systems-level thinking with attention to tactical execution  Strong leadership, mentorship, and decision-making capabilities  Excellent documentation, presentation, and communication skills  High level of integrity, accountability, and mission focus Job Types: Full-time, Permanent Benefits: Cell phone reimbursement Health insurance Paid sick time Paid time off Provident Fund Experience: electronics design: 8 years (Required) Work Location: In person

Category Engineering Hire Type Employee Job ID 12350 Remote Eligible No Date Posted 28/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned digital design expert with a passion for innovation and a drive for technical excellence. With over 15 years of hands-on experience in ASIC digital design using Verilog, you have a proven track record in developing high-performance microprocessor IP and optimizing designs for performance, area, power, and speed. Your background in RISC architectures and embedded processor design makes you a go-to authority in your field. You thrive on solving complex engineering challenges and have a deep understanding of microprocessor architecture, including multi-core systems and digital signal processing. Your programming skills in assembly and C/C++ enable you to bridge the gap between hardware and software, ensuring efficient and robust designs. Collaboration is at your core—you excel at working with multi-site teams, sharing your expertise, and mentoring junior engineers. Your attention to detail, commitment to quality, and ability to debug challenging issues set you apart. You are driven by continuous learning and are always eager to adopt and deploy the latest development techniques. As a Principal Engineer, you take ownership of your projects, communicate effectively with stakeholders, and contribute to both technical and project management aspects of product development. What You’ll Be Doing: Architecting and implementing embedded RISC microprocessor IP at both architectural and RTL levels using Verilog. Optimizing processor designs for performance, speed, area, and power to meet demanding silicon requirements. Generating comprehensive hardware benchmarks, analyzing results, and iterating on design improvements. Developing standalone Verilog testbenches and collaborating closely with the verification team to ensure thorough validation. Debugging complex design issues and bugs, proactively identifying root causes and implementing robust solutions. Maintaining and enhancing the current processor product line and derivative products, ensuring continuous improvement and innovation. Developing and managing detailed project plans, working in close partnership with program managers and cross-functional teams. Contributing to architectural reviews, technical documentation, and process improvements across multi-site teams. The Impact You Will Have: Drive the development of cutting-edge processor IP that powers next-generation smart devices and systems. Enhance the performance, efficiency, and reliability of Synopsys’ industry-leading ARC Processor family. Enable customers to achieve breakthrough results in silicon design and integration through your technical leadership. Mentor and elevate the skills of fellow engineers, fostering a culture of technical excellence and innovation. Shape the direction of processor architecture and design methodologies within the organization. Support the successful delivery of high-quality silicon solutions that meet and exceed customer expectations. Strengthen Synopsys’ reputation as a leader in semiconductor IP by contributing to successful product launches and deployments. What You’ll Need: Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or related field. 15+ years of experience in digital design, specifically using Verilog for ASIC development. Deep expertise in RISC architectures and microprocessor IP design, including multi-core systems. Strong programming skills in assembly language and C/C++ for embedded systems. Proven ability to optimize digital designs for performance, area, speed, and power. Experience with debugging, verification, and developing standalone testbenches. Familiarity with DSP techniques and multi-site development environments is a plus. Who You Are: Analytical thinker with exceptional problem-solving skills and attention to detail. Effective communicator who can articulate complex technical concepts to diverse audiences. Collaborative team player who thrives in a multi-site, multicultural environment. Proactive, self-motivated, and able to manage multiple priorities efficiently. Mentor and leader who supports the growth and development of colleagues. Adaptable and open to learning new technologies and methodologies. The Team You’ll Be A Part Of: You’ll join the Synopsys Designware ARC Processor development team—a global group of talented engineers dedicated to pushing the boundaries of embedded processor technology. The team values innovation, knowledge sharing, and collaboration, working across multiple sites to deliver world-class IP solutions that enable Synopsys’ customers to succeed in a dynamic marketplace. You’ll be empowered to contribute your expertise, champion best practices, and help shape the future of high-performance silicon design. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Sr. Software Development Engineer Hyderabad, India Engineering 67803 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ S ENIOR SOFTWARE DEVELOPMENT ENGINEER THE ROLE: AMD is seeking a talented, self-driven and motivated software engineer to join its RTL Synthesis software development team in Hyderabad. The candidate will be responsible for design and development of synthesis features and optimizations in AMD’s current and next generation software tools. We are looking for smart, creative people who have a passion for solving complex problems. THE PERSON: The ideal candidate has a strong background in algorithms, data structures and SW engineering, with strong foundations in C++, boost / STL and strong coding practices. Experience in logic synthesis, high-level synthesis, or RTL front-end development is preferred. The candidate should have a solid understanding of SW quality and processes. KEY RESPONSIBILITIES: Develop and drive execution of comprehensive, highly effective software for sophisticated new technology and new product introduction projects Validate new SW features before releasing them to customers Contribute to a high-functioning feature team Collaborate closely with multiple teams to deliver key planning solutions and the technology to support them Help contribute to the design and implementation of future architecture for a highly scalable, durable, and innovative system Work very closely with dev teams and Project Managers to drive results REQUIRED EXPERIENCE: BS or MS in CS, EE or CE with 3+ years of software development experience Background in EDA tools development preferred Strong background in computer algorithms and data structures. Strong background in C++ programming including boost and STL Familiarity with parts of the VLSI Implementation or Verification flow. Familiarity with Verilog or VHDL. Excellent problem solving skills and willingness to think outside the box Experience with production software quality assurance practices, methodologies and procedures Excellent communication skills and experience working with global teams PREFERRED EXPERIENCE: Compilers, RTL front-end development RTL Synthesis algorithms, datapath or high-level synthesis Timing/area/power optimizations Technology mapping Static timing analysis Simulation, Formal Verification or Design For Test Exposure to FPGAs and FPGA software tool chain. ACADEMIC CREDENTIALS: Bachelor’s or Master’s degree in Computer/Software Engineering, Computer Science, or related technical discipline #LI-SG AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Category Engineering Hire Type Employee Job ID 12379 Remote Eligible No Date Posted 28/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and detail-oriented engineer with a drive to deliver high-quality, innovative hardware solutions. You thrive in collaborative, cross-functional environments and are energized by working on world-class microprocessor IP that powers some of the most advanced embedded systems on the planet. With a strong foundation in electronics engineering or computer science, you bring at least five years of hands-on experience in ASIC physical design, particularly in physical verification and IR analysis. Your expertise enables you to navigate complex design flows, and you are keen to expand your knowledge by engaging with the latest industry tools and methodologies. You are comfortable scripting in Unix, Perl, and TCL, and you have a working knowledge of hardware description languages like Verilog or VHDL. You possess excellent written and verbal communication skills, allowing you to work effectively with international teams and assist in customer engagements. Your methodical and analytical mindset helps you troubleshoot and optimize designs for performance, power, and area. Eager to learn, you look forward to being involved in both in-house test chip projects and customer-facing design-ins, gaining exposure to a wide range of applications for Synopsys’ ARC processor IP. You are committed to continuous personal and professional growth, and you value the opportunity to contribute to a team that is shaping the future of microprocessor technology. What You’ll Be Doing: Developing and optimizing physical design implementation flows for ARC family microprocessor IPs, ensuring best-in-class performance and power efficiency. Performing comprehensive physical verification, including LVS, DRC, and IR drop analysis, to ensure first-pass silicon success. Collaborating with cross-functional teams, including logic design, verification, and library development, to drive seamless integration and qualification of IP. Supporting benchmarking, test chip implementation, and qualification activities for new microprocessor IP families. Assisting with customer support, design-ins, and technical sales engagements, providing insights into implementation best practices. Automating and enhancing existing design flows using scripting languages such as Perl and TCL to improve efficiency and reproducibility. Participating in internal knowledge-sharing initiatives and contributing to the continuous improvement of team processes and methodologies. The Impact You Will Have: Enable Synopsys customers to achieve rapid, successful integration of advanced ARC processor IP into their SoC designs. Drive the delivery of highly optimized, silicon-proven IP, reducing time-to-market for embedded and high-performance applications. Enhance the robustness and scalability of Synopsys’ implementation flows, setting industry benchmarks for physical design quality. Support the development and qualification of next-generation microprocessor IP, fueling innovation in diverse application domains. Strengthen customer relationships by providing expert technical guidance and support during pre- and post-sales engagements. Contribute to the continuous improvement of Synopsys’ engineering excellence, maintaining our leadership in silicon design. What You’ll Need: Bachelor’s degree in electronics engineering or computer science (Master’s preferred). Minimum 5 years of hands-on experience in ASIC physical design, with a focus on physical verification and IR analysis. Proficiency in scripting languages such as Unix shell, Perl, and TCL to automate design tasks. Exposure to hardware description languages such as Verilog or VHDL. Strong analytical and troubleshooting skills, with attention to detail in solving complex design challenges. Who You Are: A collaborative team player who communicates effectively with colleagues across the globe. Methodical and analytical, with a passion for continuous learning and improvement. Adaptable and open to new ideas, technologies, and design methodologies. Self-motivated and proactive in identifying and resolving technical issues. Customer-focused, with the ability to translate technical concepts into actionable solutions. The Team You’ll Be A Part Of: You’ll join a diverse, international team of experts dedicated to developing and delivering industry-leading microprocessor IP for the ARC family. The team works at the intersection of hardware design, implementation, and customer enablement, supporting a full suite of Synopsys memory compilers and standard cell libraries. You will collaborate closely with colleagues across logic design, verification, and applications engineering, learning from and contributing to a vibrant culture of innovation, knowledge sharing, and technical excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description Job Description Ø Define and develop verification environments Ø Write verification plans, and documentation Ø Generate test bench and automatic regression plans Ø Be responsible for verification architecture, simulations, verifications, and debugging of circuit and logic designs Ø Complete block-level verification and chip level verification Ø Bring a self-motivated and enthusiastic approach that will achieve any new Ø requirements and overcome all challenges Ø Able to work mostly independently and handle complex SoC Verification platform. Able to debug the RTL for design intent and Interface with cross-functional teams and collaboration in all verification related activities Requirements/Qualifications Qualifications/Requirements Ø Minimum of 4 years related proven silicon design or verification work experience Ø Hands on project experience with leading edge verification methodologies like OVM/UVM Ø One of the Protocol knowledges AXI/AHB/DDR/PCIe is must Ø Hands on project experience in coverage/assertion driven verification Ø Knowledge of IC chip design, development flow, process, and methodology Ø Knowledge of CMOS logic design, circuit design, and circuit analysis Ø Proficient in HDL languages System Verilog, Verilog and VHDL Ø Good knowledge of UNIX shell scripting, Perl and TCL scripting. Ø Good knowledge and understanding of CMOS device operation and characteristics Ø Proven experience in writing verification plans and test bench development, simulation, and debugging Ø Proficient with UNIX environment, and CAE/CAD tools such as schematic capture, simulation, design verification Ø Must be able to learn new technology Ø Good analytical and problem-solving skills Ø Excellent written and verbal communication in English. Ø Experience dealing with and communicating at different levels of the organization Travel Time 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Position: IP Verification Engineer Location- Pune (Hybrid OR WFH) MS (or higher) in EE/EC/ECC Engineering 7+ years of design verification experience. As a member of the Design Verification [Pre-Silicon DV] Team for NXP WCS/SCE BU. You will be responsible for verification of various IP’s and/or SoC. Candidate must be self-motivated and capable of working independently or as part of a team. You will implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals. You will also assist with developing test-plans, debugging failures and analyzing coverage information. Must have excellent knowledge of computer architecture and design verification fundamentals Must have experience with Verilog and popular EDA simulation, System Verilog assertions and testbench methodologies Must have experience in developing complex test bench in System Verilog using OVM/UVM methodology Hands-on experience in AMBA protocol, PCIe MAC, USB MAC, Bluetooth MAC, Wifi 802.11 MAC layer protocol Experience in Low Power Simulation/UPF setup, debug low power simulation failures. Exposure to scripting languages like Perl, Unix shell or similar languages Good to have some experience with assembly language programming required Excellent written and oral communication skills necessary.

At Cadence, we are constantly seeking talented and motivated individuals to join our team and contribute to the ever-evolving world of technology. As part of the Modus R&D team at Cadence Design Systems, we are currently looking for an engineer who is passionate about validating and supporting Design-for-test (DFT) technologies. The ideal candidate should have a minimum of 2 years of experience in DFT/ATPG/ASIC Design flows, along with a solid understanding of RTL Verilog/VHDL coding styles and Synthesis. In this role, you will be responsible for working on complex problems that require innovative thinking and collaborating with various teams to propose out-of-box solutions focusing on robustness, PPA, and scalability. Excellent communication skills, both written and oral, are essential as you will be required to interface with Product Engineers (PEs) and R&D, with occasional direct customer support responsibilities. Key Responsibilities: - Validate and support DFT technologies such as 1500 Wrapper, Compression, RTL DFT, Low Pin Count Test, Hierarchical Test, LBIST, etc., using Cadence Synthesis tool Genus and ATPG using Cadence Test tool Modus on both in-house and customer designs. - Develop testplans for verifying new features, create and execute test cases, and report bugs/enhancements in tools. - Collaborate with R&D and Product Engineering teams to review feature specifications, testplans, and customer issues. - Debug customer-reported issues and propose/implement solutions to address them effectively. Requirements: - B.E/B.Tech with 2+ years or M.E/MTech in Electronics/Electrical engineering. - Proficiency in Digital electronics and Verilog. - Strong understanding of DFT techniques and methodologies. - Familiarity with Test standards like 1149.1, 1500, 1687 is a plus. - Experience with Cadence Test or other Test tools is preferred. Join us in our mission to tackle challenges that others can't. Your contributions will make a difference in shaping the future of technology.,

Hi, Tech Mahindra Hiring AMS Verification Engineers for Bangalore Location. Exp: 6-8yrs NP: 0-30days JD: Demonstrated experience in ASIC design verification methodologies and flows. Develop detailed and comprehensive test plans. Develop verification test benches in SV/UVM at block, inter-block, and chip levels. Apply innovative verification techniques including assertions to Mix Signal designs. Participate in the review of design verification coding and coverage metrics. Work collaboratively with the team to develop & incorporate the latest test technologies & processes. Preferred experience of System Verilog Models for the Analog blocks. Understanding of adding connect module at the interaction of schematic and model while running AMS simulations If you are interested then share cv to Preeti.Rajput@TechMahindra.com

As a Principal Product Engineer at Cadence, you will be a part of a team that is at the forefront of electronic design, leveraging over 30 years of computational software expertise to transform design concepts into reality. You will have the opportunity to work with the world's most innovative companies, contributing to the development of extraordinary electronic products across various dynamic market applications such as consumer electronics, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health sectors. Cadence offers a stimulating work environment that fosters creativity, innovation, and impact. Our employee-friendly policies prioritize the physical and mental well-being of our workforce, support career development, provide continuous learning opportunities, and recognize and celebrate individual and collective successes. Our unique "One Cadence - One Team" culture emphasizes collaboration both within and across teams to ensure customer success. In this role, you will work with a diverse and passionate team of individuals who are dedicated to exceeding customer expectations and making a difference every day. Cadence provides numerous avenues for personal and professional growth, regardless of where you are in your career journey. To excel in this position, you should have a solid understanding of Hardware Description Languages (HDL) such as Verilog, System Verilog, and VHDL, along with experience in logic synthesis tools. Proficiency in timing concepts, SDCs, PPA push and analysis, 1801/UPF concepts, awareness of P&R flows, and power analysis and optimization would be advantageous. The ideal candidate should hold a BE/BTech/ME/MS/MTech degree or equivalent qualification. If you are looking to be part of a team that is committed to solving challenging problems and making a meaningful impact, Cadence is the place for you. Join us in our mission to tackle what others cannot.,

The ideal candidate for this position should have 1-2 years of experience in AMS design verification. You will be responsible for developing Verilog/VerilogA/VerilogAMS models for signal and power management modules to support top-level verification. Experience in full chip DV would be an added advantage. You will contribute to the development of the Full-Chip AMS-DV plan and own significant pieces of this verification process. It is essential to have the ability to drive best practices in the field of AMS-DV. In this role, you will work independently to identify bugs and resolve them formally with cross-functional teams. An understanding of analog power IPs will be beneficial as it can help in the debugging of chip-level AMS bugs. Proficiency in using tools such as Cadence Virtuoso, Spectre & Spice simulation, Incisive, and AMS simulators is required. You will utilize RTL and Gates+SDF, including process variation in back-annotated timing simulations. This will involve verifying chip-level timing between analog and digital circuits, parasitic resistance and capacitance, and using Assura parasitic extraction tools. Experience in constrained-random stimulus and auto-checking verification environments, especially constrained-random analog stimulus, is desired. The successful candidate should be able to work efficiently in a fast-paced product development environment. You will manage bug tracking and RTL code coverage, collaborate with design and systems teams to address bugs as they arise, and review digital and analog designs to provide guidance on Design for Verification architecture and features during chip development.,

You will be responsible for developing the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Additionally, you will participate in defining the architecture and microarchitecture features of the block being designed. You will apply various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals, as well as design integrity for physical implementation. It will be your responsibility to review the verification plan and implementation to ensure design features are verified correctly. You will also resolve and implement corrective measures for failing RTL tests to ensure the correctness of features. Providing support to SoC customers to ensure high-quality integration and verification of the IP block will also be a part of your role. Furthermore, you will drive quality assurance compliance for a smooth IP SoC handoff. Qualifications: - A Master of Science (or a Master of Technology) degree in Electrical Engineering with more than six years of relevant industry experience, or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than eight years of relevant industry experience. - Expertise in microarchitecture, design, development, and integration of design blocks (IP) for system-on-chip (SoC) components. - Knowledge of power management is preferred, and experience with formal apps would be beneficial. - Expertise in Verilog and System Verilog-based logic design. - Experience in synthesis flow and timing closure, CDC, FEV. Knowledge of Python, Perl is a must. - Knowledge of considerations for performance, power, and cost optimization is desirable. - Knowledge of formal property verification using Jasper is preferred. - Demonstrate excellent self-motivation, communication, strong problem-solving, and teamwork skills. - Ability to set aggressive goals and meet/beat commitments. - Flexible enough to work in a dynamic environment and multitask seamlessly, with the ability to work independently and in a team. - Knowledge in IPs like I2C, I3C, SPI, UART, etc., is preferred. - Experience in the field of Dfx (ATPG coverage, SCAN insertion, VISA insertion, etc.) will be an added advantage. In this role, you will work within the Client Computing Group (CCG) at Intel, responsible for driving business strategy and product development for Intel's PC products and platforms. The CCG aims to deliver purposeful computing experiences that unlock people's potential, allowing each person to focus, create, and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. This role will be eligible for a hybrid work model, allowing employees to split their time between working on-site at their assigned Intel site and off-site. Please note that job posting details such as work model, location, or time type are subject to change. ,

As a SOC Performance Modeling Engineer at AMD, you will be an integral part of the Client Performance Modeling Team based in Hyderabad, India. Your primary responsibility will involve analyzing the architectural performance of notebook and desktop processors through modeling and RTL simulation. By collaborating with SoC, IP & Model architects, you will evaluate and debug CPU/GFX/NPU processor performance and suggest architectural enhancements to drive innovation. To excel in this role, you should possess a deep passion for cutting-edge SoC architecture, digital design, and verification. Your effective communication skills and ability to work seamlessly with architects & engineers across different locations and time zones will be crucial. Strong analytical and problem-solving abilities are essential, coupled with a willingness to learn and tackle challenges head-on. Key responsibilities in this role include developing architectural models, tools, and infrastructure, optimizing performance features, proposing enhancements for next-gen SOCs, conducting trade-off studies for performance, power, and area, evaluating benchmarks for various processors, advancing simulation infrastructure and methodology, and providing technical guidance to the Client SoC team. The ideal candidate would have 3-15 years of industry/academic experience, expertise in computer system simulation and performance evaluation, familiarity with ASIC HW design and verification languages/tools such as Verilog, System Verilog, System C, OVM/OVC, proficiency in programming and scripting languages like C/C++, Perl, Python, and a track record of analyzing system bottlenecks to optimize computing systems for performance. Additionally, detailed microarchitecture knowledge of CPU, GPU, NPU, I/O subsystem, and/or DRAM controller would be advantageous. An academic background in Computer/Electrical Engineering with a Bachelor's or Master's degree is required to qualify for this position at AMD. Explore the AMD benefits at a glance to discover the comprehensive perks offered to our valued employees.,

As a Senior Verification Engineer at NVIDIA's CPU verification team, you will have the exciting opportunity to work on cutting-edge CPUs that power the next generation of self-driving cars, including high-end SoCs like Xavier. Xavier features a custom "Denver" class CPU designed to deliver exceptional performance while meeting automotive standards such as ISO26262. In this role, you will collaborate with a team of talented engineers to verify micro-architecture and architecture features at various levels, ranging from unit to subsystem and full chip testbenches, including FPGA and Silicon. You will also have the chance to work closely with CPU architects to develop verifiable designs and contribute to full-stack development, ensuring that sequences are verified at the software simulator level and successfully implemented on silicon with a complete software stack. The ideal candidate for this position should have strong verification fundamentals and the ability to seamlessly transition between working on software simulators and silicon. Proficiency in CPU architecture, particularly ARM knowledge, as well as experience with Verilog, System Verilog, and excellent debugging skills are essential. Additionally, candidates should possess a minimum of 3 years of experience in Computer Science, Electronics Engineering, or related fields at the Bachelor's or Master's level. To truly stand out in this role, you should have experience working on diverse CPU unit/microarchitecture verification projects, demonstrate expertise in coverage-driven verification, and showcase a track record of successful collaboration with geographically diverse multi-functional teams. At NVIDIA, we offer competitive salaries, a comprehensive benefits package, and an inspiring work environment that attracts some of the most talented individuals in the industry. If you are a creative and autonomous engineer with a genuine passion for technology, we invite you to join our rapidly growing, best-in-class engineering teams and make a meaningful impact in the world of CPU verification.,

As an Applications Engineer at Lattice Semiconductor, you will be an integral part of the Boards design team within the Applications engineering organization. This role offers a dynamic environment where you will have ample opportunities to contribute, learn, and grow. Your primary responsibility will be to lead all aspects of PCB design for FPGA silicon products, starting from stack-up through production. This includes tasks such as PCB development, project management, architecture, schematic entry, layout/signal integrity analysis, and validation. You will collaborate closely with cross-functional teams to establish board specifications, meet design requirements, and adhere to constraints. Your expertise in microelectronic circuit design and hardware engineering will be essential in this role. Additionally, experience in PCB development, including planning, schematic entry (Allegro or equivalent), layout/signal integrity analysis, and validation is required. Hands-on lab experience, familiarity with physical interface standards, and FPGA development skills are highly desired. Proficiency in Verilog and/or VHDL, customer technical support, and silicon support are valuable assets for this position. Effective communication skills, both written and verbal, are crucial for collaborating with various teams and supporting customer interactions. You must be able to work independently as well as in a team environment, demonstrating strong analytical and problem-solving abilities. The ability to thrive in a fast-paced environment, prioritize tasks effectively, and manage competing priorities is essential for success in this role. At Lattice, we acknowledge that our employees are our most valuable asset, driving our success in a competitive global industry. We are committed to providing a comprehensive compensation and benefits program to attract, retain, motivate, reward, and celebrate top-tier employees. As an international developer of innovative low-cost, low-power programmable design solutions, Lattice values diversity, individuality, and the unique perspectives and ideas that each employee brings to the workplace. If you are passionate about working in a results-oriented environment, eager to achieve success within a team-oriented organization, and ready to thrive in a demanding yet supportive atmosphere, Lattice Semiconductor may be the perfect fit for you. Feel the energy at Lattice and join our global workforce in unlocking innovation and driving customer success.,

You will be part of a highly skilled and challenging high-speed parallel PHY design team, focusing on DDR, LPDDR, and other similar interfaces. Your responsibilities will include designing and developing high-speed interface PHY and its sub-blocks, such as data paths, analog calibration, training, IP initialization, low power control, test, and loopback. You will be involved in various aspects of design and verification from specification to silicon, including interface design for controllers and SoCs. Actively participate in problem-solving and implementing improvements, as well as mentoring and coaching other design team members on technical issues. Collaborate with Analog designers to ensure seamless interface between Digital and Analog circuits. You should possess a strong fundamental knowledge of digital design, Verilog, and scripting languages. Experience with micro-architecture, Asynchronous digital designs, Synthesis, STA, Lint & CDC, DDR/LPDDR JEDEC protocol, DDR PHY designs, training algorithms, data path designs, domain transfer designs, APB/JTAG, and DFI is required. A degree in M.S./M.Tech, BS/BE (Electronics) and a minimum of 7 years of experience are necessary for this role. Micron Technology is a global leader in memory and storage solutions, driving the transformation of information into intelligence. With a focus on customer satisfaction, technology leadership, and operational excellence, Micron offers a wide range of high-performance DRAM, NAND, and NOR memory and storage products through its Micron and Crucial brands. The innovations created by Micron's team enable advances in artificial intelligence and 5G applications, powering opportunities from data centers to the intelligent edge and enhancing the client and mobile user experience. For more information, please visit micron.com/careers. For assistance with the application process or requests for reasonable accommodations, please contact hrsupport_in@micron.com. Micron is committed to prohibiting the use of child labor and complying with all relevant laws, rules, regulations, and international labor standards.,

You are a talented and motivated Design Verification Engineer with 6-15 years of experience, sought by HCLTech VLSI division in Bangalore. Your role is crucial in ensuring the functionality and quality of next-generation integrated circuits. You will be working on challenging projects, utilizing your expertise in verification methodologies and tools. Your responsibilities will include developing and implementing verification plans using industry-standard methodologies like UVM. You will design and write robust verification environments to achieve high code coverage. Utilizing simulation tools such as ModelSim, Cadence Incisive, and Synopsys VCS, you will verify RTL functionality and debug verification failures to identify design issues" root cause. Collaboration with RTL design engineers to resolve bugs and ensure design revisions meet verification requirements is key. Your participation in code reviews and adherence to verification coding standards is essential, along with staying updated on the latest verification tools and methodologies. To qualify for this role, you should hold a Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree is a plus). Your 6-15 years of experience in design verification for ASICs or SoCs, strong understanding of digital design principles, and proficiency in Verilog or VHDL with experience in methodologies like UVM are required. Experience with simulation tools and scripting languages like Python and Perl will be advantageous. Excellent analytical, problem-solving, communication, and collaboration skills are essential for effective team work. In return, HCLTech offers a competitive salary and benefits package, the opportunity to work on cutting-edge technologies and projects, a collaborative and dynamic work environment, and potential for professional development and career advancement. Thank you, Magenderan.R Manager - TAG HCLTECH,

You will be joining as a Senior FPGA Engineer professional at our Bangalore location with a minimum of 5 years of experience. In this role, your primary responsibilities will include collaborating with a team of product managers, developers, and testers to define feature requirements, developing feature specifications, and implementing detailed designs using Verilog and FPGA design tools. You will also be involved in problem isolation, fault finding in embedded systems, customer issue replication, and creating/updating release notes. Additionally, you will work closely with onsite and offsite development teams to deliver market-leading products globally and mentor junior engineers in development, code, and debugging. To excel in this role, you must be an expert Verilog/System Verilog developer with strong embedded debugging skills. Proficiency in AMD/Xilinx FPGA with Vivado/Vitis tool-chains for implementations and validation, as well as experience with Xilinx/AMD simulator/ModelSim for unit and system-level simulations, is essential. You should possess excellent analytical skills, adaptability to ambiguity and change, and a thorough understanding of the FPGA development cycle within project-based environments. Experience with modern 32-bit processors/microcontrollers like ARM, debuggers, protocol analyzers, and logic analyzers is required. Desirable skills include expertise in Embedded Linux Kernel and Device Drivers development, familiarity with video and audio codecs such as MPEG4 and JPEG, knowledge of USB protocols, and understanding of network protocol stack concepts like ethernet, IP, and TCP. Strong communication and documentation skills are necessary for this role. If you are interested in this opportunity, please share the following details along with your profile to vijitha.k@blackbox.com: - Total experience: - Relevant experience in FPGA: - Experience in Embedded: - Experience in Linux: - Current CTC: - Expected CTC: - Notice period: - Current Location: - Preferred Location: - Current Company: - Any pending offers: - Educational Qualifications,

You will be responsible for joining OnSemi's growing team in Bengaluru, India as a Sr. Principal Digital Design Engineer focused on New Product Development in Power Management. Your primary responsibilities will include working on the development of various Power Management products for consumer, industrial, and automotive applications such as DC-DC PMIC/POL, multiphase controllers, drivers, converters, LED drivers, SiC drivers, switches, and efuses. Your key responsibilities will involve collaborating with different product lines for RTL implementation of power convertor controller designs, working on digital design architecture, RTL, low power design, synthesis, and timing analysis. You will also interface with the Physical Design team for the power management chips using state-of-the-art RTL2GDS flows. As part of a large engineering team, you will collaborate effectively with design architects, digital verification, project management, and digital and analog design teams across various global locations. You will be involved in micro-architecture to RTL implementation, supporting system-level bring-up on pre-silicon platforms, and owning the technical outcome of Power Management ICs. Furthermore, you will be responsible for understanding project goals, executing with realistic schedules, reporting progress status, and supporting post-silicon validation activities. You will also lead and support customer issues, production issues, FW and system development, and failure analysis. Onsemi is a company driving disruptive innovations to create a better future, focusing on automotive and industrial end-markets. With a highly differentiated product portfolio, Onsemi aims to solve complex challenges and lead the way in creating a safer, cleaner, and smarter world. To qualify for this role, you should have a BS in Electrical Engineering or related field with 12 years of experience, or an MS with 10 years of experience in Digital Design, Architecture, and ASIC/Mixed signal chip developments. The ideal candidate will possess a thorough understanding of the end-to-end digital design flow, RTL design, CDC, ASIC synthesis, timing analysis, P&R, UPF, system Verilog, Verilog, TCL, and Perl/Python/XML programming languages.,

You should have a minimum of 5 years of experience in developing FPGA-based prototype platforms. Your expertise should include proficiency with Xilinx (AMD) Vivado toolchain and implementation flow, as well as Synopsys/Mentor FPGA synthesis flow. It is essential to have a good understanding of Virtex-7, Virtex Ultrascale, and Virtex Ultrascale+ Architectures. In addition, you must be proficient in Verilog/System Verilog/VHDL and have a working knowledge of C/C++. Experience in using validation environment test equipment such as Logic Analyzers, Oscilloscope, Protocol Analyzers, etc. is required for this role. Having prior experience in working on ARM core architectures would be considered an advantage for this position.,

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, you enable customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, there is quite a lot to offer. Join a team that blurs the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow's idea - it is what we make real for our customers today. Siemens EDA, a global technology leader in Electronic Design Automation software, empowers companies worldwide to develop highly innovative electronic products faster and more efficiently. Siemens EDA's Questa Simulation Product is a core R&D team working on multiple verticals of Simulation. The team is characterized by its energy and enthusiasm, comprising motivated individuals based in Noida, with opportunities for travel to other locations in India and globally. As part of this team, you will contribute to impacting entire cities, countries, and the shape of things to come. Responsibilities: - Collaborate with a senior group of software engineers on core algorithmic advances and software design/architecture within the QuestaSim R&D team of Siemens EDA. - Contribute to final production level quality of new components and algorithms, as well as create new engines and support existent code. - Demonstrate self-motivation, self-discipline, and the ability to set personal goals, working consistently towards them in a dynamic environment to enhance your success. Required Experience: - A graduate with at least 2 years of relevant working experience and a degree in B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college. - Proficiency in C/C++, algorithm and data structures, Compiler Concepts and Optimizations. - Experience with UNIX and / or LINUX platforms is essential. - Basic Digital Electronics Concepts are a plus. - Knowledge of Verilog, System Verilog, VHDL, parallel algorithms, job distribution, ML/AI algorithms, and their implementation in data-driven tasks. - Exposure to Simulation or Formal based verification methodologies is beneficial. - Self-motivated, ability to work independently, guide others towards project completion, strong problem-solving, and analytical skills. Siemens is a collection of over 377,000 minds building the future, one day at a time in over 200 countries. The company is dedicated to equality, encouraging applications that reflect the diversity of the communities it works in. Employment decisions at Siemens are based on qualifications, merit, and business needs. Bring your curiosity and creativity to help shape tomorrow.,

You will be part of the Intel Core Design Team driving Intel's latest CPUs in the world's leading process technologies. As a Pre-Silicon Verification Engineer, you will develop pre-Silicon functional verification tests to ensure that the system meets design requirements. Your responsibilities will include creating test plans for RTL validation, defining and running system simulation models, and implementing corrective measures for failing RTL tests. You will also analyze results to modify test benches and tests to improve validation plans. As a Pre-Silicon Verification Lead/Architect, you will lead and guide a team to develop complex pre-Silicon verification environments, verification components, and coverage plans. You will drive strategic initiatives related to tools, methodologies, and quality to reduce the overall cycle time of validation projects. Working closely with hardware architects and logic designers, you will influence SoC and system design to ensure product success. Additionally, you will provide technical leadership, manage resources, and drive engineering activities to meet schedules, standards, and cost. To qualify for this role, you must possess a master's degree in Electronics or Computer Engineering with at least 4 years of experience or a Bachelor's Degree with at least 10 years of experience in Pre-Silicon Verification Environment. Preferred qualifications include experience with RTL design, Verilog, System Verilog based verification techniques, CPU architecture/Processor Verification, Perl/Python, Linux OS, SVTB UVM, or Specman (e). You should be a team player with excellent self-motivation, communication, problem-solving, and teamwork skills. The Client Computing Group (CCG) at Intel is responsible for driving business strategy and product development for PC products and platforms. As part of this group, you will contribute to delivering purposeful computing experiences that unlock people's potential. This role is an Experienced Hire position based in India, Bangalore, and eligible for a hybrid work model that allows splitting time between on-site and off-site work.,