2759 Verilog Jobs - Page 18

About Scaledge: Scaledge is one of the fastest growing product engineering services companies focused on Semiconductor Chip - Design & Verification, Processors, System design and related Embedded Software development for domains like Storage, RISC-V, AI/ML, Automotive, Consumer, Networking and IoT. We are headquartered in Silicon Valley, USA with multiple design centers across India, UK and Canada. Scaledge has a strong history of technology, methodology & domain expertise in IP/ASIC/SOC verification in Storage, Networking, Mobile & Consumer industry About Opportunity: Scaledge is looking for experienced, talented Verification Engineers (ASIC/IP/SOC/CPU/GLS) for dynamic and innovative Team. As a member of the team, you will be responsible for verifying the design, architecture and micro-architecture using advanced verification methodologies Requirements Experience 5+ years. Hiring for Senior Engineer, Technical Lead, and Architect levels Dedicated/hands-on ASIC/IP/SOC DV experience. Experience working on block level UVM test benches - writing drivers, scoreboards, sequences, constraints, and functional coverage models Strong interest in understanding the architectural and micro-architectural details of a design. Strong interest in debugging complex issues Drive and adopt new verification methodologies to improve effectiveness and efficiency Experience working on the memory subsystem is a plus Responsibilities Build UVM test benches and own the verification of an IP from start to finish. Create coverage driven verification plans from specifications. Execute, review and refine to achieve coverage targets. Set up regressions and triage failures. Debug and drive any design and verification bugs found, to closure. Work with the team to improve DV methodology and infrastructure. Required Skills Strong knowledge of Verilog, System Verilog, and Object-Oriented Programming Experience with modern verification techniques, especially including System Verilog, UVM, constraint-random and functional coverage methodologies Complete understanding of verification life cycle and ability to create of comprehensive verification plans Knowledge of high-speed PCIe, DDR, USB, AXI, APB, AHB protocols Experience verifying networking protocols such as Ethernet is a plus Experience with scripting languages such as Python, Tcl, or Perl Experience working in a team environment through the ASIC Project lifecycle from Planning to Tape Out Strong technical writing and verbal communication skills Education BTech/MTech in Electronic/Microelectronics, Electrical Engineering or Computer Science. Other Science graduates would be considered if they have relevant experience.

Senior RTL Design Engineers Experience : 3-5 years Location : Hyderabad Strong RTL(verilog/system verilog) skills with experience in IP development. • Ability to verify designs by writing simple testbenches. • Strong foundation in logic synthesis and timing closure concepts. • Good knowledge of SoC architecture, AXI bus protocols, hardware debug. • Experience of working with Xilinx FPGAs, Vivado tool flows and micro architecture development is a plus. Interested,please drop your updated resume to janagaradha.n@acldigital.com

Vicharak is on the lookout for a passionate and dynamic Computer Science Intern who will play a pivotal role in the convergence of software and hardware, contributing to the development of cutting-edge technologies. This internship offers a unique opportunity to work on Vaaman, our revolutionary single board computer, and gain hands-on experience in software development, Linux kernel understanding, and hardware acceleration over FPGA. Responsibilities: Software Development: Collaborate with the software development team to design, implement, and optimize software solutions for Vaaman's diverse applications. Write clean, efficient, and well-documented code in languages such as C/C++ and other relevant programming languages. Linux Kernel Understanding: Gain insights into the Linux kernel architecture and contribute to kernel-level software components for Vaaman, ensuring seamless integration with the operating system. Hardware Acceleration Design: Work closely with hardware engineers to design and implement hardware acceleration solutions over FPGA, leveraging your understanding of computer architecture. Develop FPGA configurations to optimize performance for specific applications, contributing to the overall efficiency of Vaaman. Programming Languages: Utilize your proficiency in C/C++ and other programming languages to implement robust and efficient software solutions for Vaaman's diverse range of functionalities. Collaboration and Communication: Engage in cross-functional collaboration with software developers, hardware engineers, and other team members. Effectively communicate technical concepts and ideas within the team. Requirements: Currently pursuing a degree in Computer Science or related field. Strong programming skills in C/C++ and familiarity with other relevant languages. Understanding of Linux kernel architecture. Interest in hardware acceleration and FPGA development. Eagerness to learn and adapt to new technologies and challenges. Effective communication and teamwork skills. Preferred Qualifications: Previous experience with FPGA development tools and languages (Verilog, VHDL). Exposure to Linux kernel-level development. Familiarity with computer architecture concepts. Enthusiasm for exploring innovative solutions at the intersection of software and hardware.

Job Title: RTL Design Engineers Exp Level: 4+ yrs Loctaion: Hyderabad Job Description: • RTL coding knowledge • Top-level (SOC) level basic industry standard Arch knowledge • SoC & IP level Integration knowledge • IPXACT knowledge • IORING and Phys & GPIOs basic functionality • Design Partitioning(Tilification) knowledge • Design RTL quality checks: Clock domain crossing(CDC) Reset domain crossing(RDC) LINT VSI UPF knowledge LEC(Logic equivalence check) Timing concepts & SDC knowledge • Tools knowledge: Vc_static or equivalent other tools(VSI) VC_spyglass LINT, CDC and RDC 0in Formality and conformal LEC tool • Design and scripting languages: Verilog and SV Perl Python TCL

Experience: 4 years Location: Hyderabad FPGA Design: Develop FPGA designs using hardware description languages (HDLs) such as VHDL or Verilog. Implement and optimize complex digital logic circuits for high-performance applications. Synthesis & Optimization: Perform synthesis, place and route, and optimization of FPGA designs to ensure optimal area, performance, and power consumption. Testbench Development & Verification: Develop and execute testbenches for simulation and verification of FPGA designs using tools such as ModelSim, Vivado, or Questa. Ensure designs meet functional, timing, and performance requirements.

Design Verification Engineer_Full-Time_Bangalore(Hybrid) Hi, Greetings from Best Infosystems Ltd.! We've spotted your impressive profile and have an exciting opportunity tailored to your skills and passions. Job Title: Design Verification Engineer Job Type: Full-Time Location: Bangalore (Hybrid) Experience: 8+ years Job Description: About the role: We are seeking a seasoned Design Verification Engineer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions. Responsibilities: • Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems • Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards • Collaborate with software teams to define and implement configurable test benches • Work with design teams test plans, failure debug, coverage, etc. Qualifications and Preferred Skills: • BS, MS in Electrical Engineering, Computer Engineering or Computer Science • 8+ years and current hands-on experience in block-level/IP-level/SoC-level verification • Proficiency in Verilog, SystemVerilog • Familiarity with industry-standard EDA tools for simulation and debug • Deep experience with UVM-based test benches • Experience with modern programming languages like Python • Knowledge of Arm AMBA protocols such as AXI, APB, and AHB • Understanding of Arm CHI protocol is a plus • Experience on working with IPs for caches, cache coherency, memory subsystems, interconnects and NoCs • Experience with formal verification techniques, emulation platforms is a plus • Excellent problem-solving skills and attention to detail • Strong communication and collaboration skills

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SOFTWARE DEVELOPMENT ENGINEER 2 The Role We are looking for a dynamic, upbeat software engineer to join our growing team. As a key contributor you will be part of a leading team to drive and enhance AMD’s abilities to deliver the highest quality, industry-leading technologies to market. The Person The ideal candidate possesses an innovative and problem-solving mindset, has a keen eye for FPGA architecture and performance modeling, and is diligent and passionate about Technology. Key Responsibilities Performance estimation of diverse workloads on FPGAs composed of heterogeneous compute elements Contribute to a high-functioning architecture and performance modeling team Collaborate closely with multiple teams to deliver key planning solutions and the technology to support them Help contribute to the design and implementation of future architecture for a highly scalable, durable, and innovative system Preferred Experience Good knowledge and hands-on experience in C, Python, Verilog Good understanding of FPGA architecture and EDA tool flow. Familiarity with Linux and modern software tools and techniques for development Good analytical and problem-solving skills Academic Credentials Master’s degree in Computer or Electronics Engineering, or related technical discipline Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Location: Bengaluru (Client Site) Job Type: Full-time Experience: 3-7 years Notice Period: 0-15 days (immediate joiners preferred) No. of Positions: 1 Lead & 4 Engineers About The Role We are seeking a skilled FPGA Engineer with 37 years of experience in RTL design using Verilog, along with expertise in Xilinx MPSoC platforms, MicroBlaze processor development, and embedded system security aspects such as authentication, encryption/decryption, and certificates. The ideal candidate will play a key role in architecting and implementing secure, high-performance digital logic systems. Requirement Experience band 3-7 years Experience in RTL coding using Verilog Experience on development on Xilinx MPSoC (preferably ZCU 106/104) Hands-on experience with Xilinx Vivado and Vitis Desirable to have experience with MISRA C coding guidelines Desirable to have experience with DO-254 Desirable to have experience with Microblaze Desirable to have experience in security aspects of authentication, certificates, encryption/decryption How to Apply If you are passionate about embedded systems and meet the above requirements, we would love to hear from you. Kindly share your resume at: hr@advantal.net For more information, connect with us at: 91 91312 95441

Location: Bengaluru (Client Site) Job Type: Full-time Experience: 3-7 years Notice Period: 0-15 days (immediate joiners preferred) Embedded Engineer Advantal Technologies is seeking for the following positions: Experience band 3-7 years (We can have one lead of experience around 7 and rest 3 years) Experience in C programming on Bare Metal Experience on development on Xilinx MPSoC (preferable ZCU 106/104) Hands-on experience on Xilinx Vitis Desirable to have experience on MISRA C coding guidelines Desirable to have experience on DO-178C Experience on device driver development Experience on protocols: I2C, SGMII, UART, SPI Desirable to have experience on security aspects of authentication, certificates, encryption/decryption FPGA Engineer: Experience band 3-7 years (We can have one lead of experience around 7 and rest 3 years) Experience in RTL coding using Verilog Experience on development on Xilinx MPSoC (preferable ZCU 106/104) Hands-on experience on Xilinx Vivado and Vitis Desirable to have experience on MISRA C coding guidelines Desirable to have experience on DO-254 Desirable to have experience on Microblaze Desirable to have experience on security aspects of authentication, certificates, encryption/decryption Technical Lead Minimum 8 years of experience. Minimum of 2 years experience in leading teams Excellent understanding of embedded system development and real-time application development. Hands-on experience in bare-metal code development using C, over an embedded platform Hands-on experience of FPGA design flow and experience digital design development using Verilog HDL. Experience in DO-178C compliance and certification Understanding of software development using API, and networking protocols Should be able to address the non-functional aspects like performance, scalability, reliability, availability etc. Should have a good understanding of the security aspects of the applications like authentication, authorization, public key infrastructure, SSL, certificates, etc. Good hands-on with design, coding, and resolving the technical issues Good experience in review process architecture, design, code. Fair understanding and working experience in Qt, C / Java/python programming languages. Technical hands-on with tools and related framework. Strong interpersonal and excellent communication skills. Testers Minimum 3 years of experience in testing of embedded systems. Experience in test case design and related execution. Experience in testing Zynq ultrascale MPSoC using Xilinx Vivado. Experience in writing test bench using Verilog/System Verilog. Experience in QuestaSim or equivalent simulation tool, simulation environment creation, good experience in code coverage, branch coverage. If interested, please contact hr@advantal.net

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe®, CXL®, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com . We are seeking a Senior Digital Design Engineer with deep expertise in high-performance controller and bridge design, micro-architecture, RTL implementation, and IP integration. The ideal candidate will play a critical role in the development of cutting-edge connectivity solutions. Key Responsibilities Design and implement high-performance digital solutions, including RTL development and synthesis. Collaborate with cross-functional teams on IP integration for processor IPS and peripherals Deep knowledge of processor boot process and peripheral implementation with boot firmware in mind Own block-level and full-chip designs from architecture to GDS, focusing on designs at nodes ≤ 16nm. Ensure timing closure, assess verification completeness, and oversee pre- and post-silicon debug. Utilize tools from Synopsys/Cadence and apply expertise in UVM-based verification flows Basic Qualifications Bachelor's in Electronics /Electrical Engineering (Master's preferred). 5+ years of digital design experience, with 3+ years focused on processor, peripherals and full chip implementation. Proven expertise in RTL development, synthesis, and timing closure. Experience with front-end design, gate-level simulations, and design verification. Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused attitude. Required Expertise Hands-on experience with processor IP (ARM/ARC) Hands-on pre-silicon and post-silicon implementing peripherals for I2C/SPI/UART Strong proficiency in System Verilog/Verilog and scripting (Python/Perl). Silicon bring-up and post-silicon debug experience. Familiarity with Synopsys/Cadence tools and UVM-based design verification. Preferred Experience Hands-on experience with complex DMA engines and FW interaction Knowledge of system-level design with ARM/ARC/RISC-V processors sub systems Experience with block-level and full-chip design at advanced nodes (≤ 16nm). Understanding of PAD design, DFT, and floor planning. Experience with NIC, switch, or storage product development. Familiarity with working in design and verification workflows in a CI/CD environment. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Job Title: IP Design Technical Lead/ Staff ASIC RTL Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and forward-thinking digital design expert with a strong foundation in ASIC RTL design and a proven track record of delivering complex, high-performance IP cores. With a Bachelor’s or Master’s degree in EE, EC, or VLSI and over four years of relevant industry experience, you thrive in dynamic, multi-site environments and excel at translating functional specifications into robust, scalable architectures. You’re adept at working with advanced protocols such as Ethernet, DDR, PCIe, and USB, and have hands-on experience in data path and control path design, including Reed Solomon FEC, BCH codes, and MAC SEC engines. Your expertise extends to synthesizable Verilog/SystemVerilog coding, timing closure, CDC analysis, and P&R-aware synthesis, complemented by a keen understanding of design trade-offs in area, latency, and throughput. You are comfortable leveraging version control systems like Perforce and scripting languages such as Perl or Shell to automate and streamline workflows. As a natural leader, you are ready to mentor and technically guide a team of designers, fostering a collaborative and inclusive culture. Communication comes easily to you, and you’re known for your proactive problem-solving skills, attention to detail, and unwavering commitment to design quality. You’re seeking an opportunity to take ownership of challenging projects, contribute to cutting-edge innovation, and grow alongside a team of world-class engineering professionals. What You’ll Be Doing: Architecting and implementing state-of-the-art RTL designs for the DesignWare IP family, targeting commercial, enterprise, and automotive applications. Translating standard and functional specifications into detailed micro-architectures and comprehensive design documentation for medium to high complexity features. Leading and contributing hands-on to RTL coding, synthesis, CDC analysis, debug, and test development tasks. Collaborating with global teams and engaging directly with customers to understand and refine specification requirements. Driving technical excellence in design processes, including linting, static timing analysis, formal checking, and P&R-aware synthesis using tools such as Fusion Compiler. Mentoring and technically leading a team of designers, providing guidance on best practices and innovative design methodologies. Utilizing version control systems and scripting to manage design flows and automate repetitive tasks for improved efficiency. The Impact You Will Have: Enable Synopsys to deliver industry-leading, high-performance IP cores that power next-generation technologies. Contribute to the successful execution of complex, global projects that set new standards in chip design and verification. Accelerate time-to-market for customers in commercial, enterprise, and automotive sectors by delivering robust, reliable IP solutions. Elevate the technical capabilities of your team through mentorship and leadership, cultivating a culture of continuous learning and innovation. Drive improvements in design quality, efficiency, and scalability through process optimization and automation. Directly influence product architecture and feature enhancements, ensuring alignment with customer needs and emerging industry trends. What You’ll Need: Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or related field. 4+ years of hands-on industry experience in ASIC RTL design, with a strong portfolio of completed projects. Deep expertise in data path and control path design, including experience with Reed Solomon FEC, BCH codes, CRC architectures, and MAC SEC engines. Proficiency in synthesizable Verilog/SystemVerilog, simulation tools, and design flows including lint, CDC, synthesis, and static timing analysis. Familiarity with high-speed design (>600MHz), P&R-aware synthesis, and EDA tools such as Fusion Compiler. Experience with version control systems (e.g., Perforce) and scripting languages (Perl, Shell) for design automation. Knowledge of industry protocols: Ethernet, DDR, PCIe, USB, MIPI-UFS/Unipro, SD-MMC, AMBA (AMBA2, AXI). Exposure to quality processes in IP design and verification is an advantage. Prior experience as a technical lead or mentor is highly desirable. Who You Are: Innovative thinker with a solutions-oriented mindset and a passion for technology. Excellent communicator who thrives in collaborative, multicultural, and multi-site environments. Natural leader with mentoring abilities, fostering inclusion and diversity within the team. Detail-oriented professional with strong analytical and problem-solving skills. Self-motivated, adaptable, and eager to drive technical excellence and process improvements. Committed to continuous learning and staying ahead of industry trends. The Team You’ll Be A Part Of: You will join the R&D Solutions Group at our Bangalore Design Center, as part of the DesignWare IP Design team. This diverse and innovative group is dedicated to architecting, developing, and delivering cutting-edge IP cores that enable Synopsys’ global customers to achieve their design goals. The team thrives on collaboration, technical excellence, and shared success, working in a supportive environment that values creativity, knowledge sharing, and continuous growth. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates. Requisition ID: 74911 Responsibilities Work with a dedicated team, verifying analog and mixed-signal building blocks for SOCs, with a focus on the portable, ultra-low power audio markets. Participate in all aspects of the mixed-signal design verification, in partnership with the design engineering team, to develop and implement a mixed-signal verification infrastructure to verify all functional and performance requirements. Required Experience and Skills 5-10 yrs of relevant industry experience Insatiable curiosity to learn about new circuit architectures to advance ultra-low power audio devices A keen understanding of modern mixed-signal verification challenges and solutions. Solid foundation in network theory, amplifier design and data converters. Experience developing RNM behavioral models using System Verilog/VerilogAMS for analog blocks like analog/digital PLLs, ADCs, DACs, LDOs. Experience developing and maintaining chip level performance simulations of mixed-signal SOC designs. Ability to create and maintained mixed signal verification plans based on early system specifications or incomplete design definitions. Competent in the Cadence Virtuoso environment to setup and execute parameterized simulations of analog and SOC designs. Experienced in producing detailed technical reports and documentation. Experienced in Low-power audio amplifiers (Class D), audio converters, audio interfaces (I2S, PDM), and audio performance metrics (Dynamic Range, SNR, THD) is highly preferred. Experienced in Flow automation using command line scripts using Python, Matlab, Ocean, Perl, Csh, Make, etc. Simulation performance and accuracy trade-offs based on design requirements Experienced in Power-aware mixed-signal verification Hands-on verification of sub-45nm CMOS SOC designs Desired Experience and Skills Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. Work closely with design/verification teams within CPU to develop comprehensive test plan. Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. Verify power intent through use of methodologies like UPF. Work closely with system architects, software teams and Soc team to validate system use cases. Work closely with emulation team to enable verification on emulators and FPGA platforms. Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. BE/BTech degree in CS/EE with 3+ years’ experience. Experience in power management verification. Implementation of assembly and C language embedded firmware. Experience in C/C++, scripting languages, Verilog/system Verilog. Strong understanding of power management features in CPUs and CPU based Socs. Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements Good Understanding of CPU architectures and CPU micro-architectures. In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture Experience with advanced verification techniques such as formal and assertions is a plus Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3073352

Waymo is an autonomous driving technology company with the mission to be the most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo One, a fully autonomous ride-hailing service, and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over one million rider-only trips, enabled by its experience autonomously driving tens of millions of miles on public roads and tens of billions in simulation across 13+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms. In this role, you'll report to a Hardware Engineering Manager. This position will require the ability to work some hours that align with the team in the Pacific Daylight Time (PDT) zone on an as needed basis. You Will Establish a good understanding of chip's architecture, intended functionality and IPs Collaborate with verification and emulation teams in the pre-silicon phase, and create post-silicon test plans Perform functional and performance validation to to make sure the chip meets expectations Develop and execute stress test and PVT corner characterization to ensure robustness Effectively debug failures encountered during testing Develop automation for test execution, data post-process and reporting You Have Bachelor's degree in Electrical Engineering or Computer Engineering 3+ years of hands-on experience in silicon validation and bring-up of complex ASIC Demonstrated experience in at least one of the following areas, with a proven ability to apply that knowledge to silicon validation: IC design, verification, emulation, sw/fw development Experience in design or validation of at least one of the following subsystems: DDR, high-speed SerDes, Ethernet, CPU, GPU, NoC Proficiency in at least one of the programming or scripting languages: C/C++, System Verilog, Python Proficiency in lab equipment and debug tools, such as oscilloscope, protocol analyzer, JTAG debugger, etc We Prefer Experience with peripheral interfaces and protocols, such as I2C, SPI, UART, JTAG Familiarity with automotive standards and test methodologies Experience in developing and utilizing automated test scripts and frameworks for validation efficiency. Exposure to pre-silicon verification methodologies and the ability to ability to correlate with post-silicon results Experience in electrical validation and compliance test for IO interfaces The expected base salary range for this full-time position is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range ₹3,200,000—₹3,870,000 INR

As part of the custom product business at our company, you will be contributing to the development of industry-leading custom IC system solutions across various product categories such as display and touch power products, camera PMICs, charger power products, power switches/muxes, Laser drivers, and high-speed communication interfaces. By integrating signal chain and power components, your work will play a key role in enabling our customers to enhance their next-gen products in the personal electronics domain. Joining our team presents a unique opportunity to be part of a world-class custom semiconductor team. Your responsibilities in this role will include verifying complex analog designs/systems and providing support for the validation of designs on silicon. You will be responsible for releasing meticulously analyzed and simulated IC designs in a timely manner, ensuring they deliver optimal performance, cost-effectiveness, high quality, and meet our customers" end system requirements. Additionally, you will define, specify, model, plan, and implement the AMS verification strategy for mixed-signal ICs, including creating detailed verification plans and test cases, evaluating system-level use-cases, and contributing to post-layout parasitic extraction and simulation activities. To excel in this role, you are expected to have a strong background in defining and developing verification infrastructure for mixed-signal semiconductor products, along with a good understanding of analog circuits and expertise in tools such as Cadence Virtuoso, Cadence Spectre/TISpice, and Verilog-AMS/SystemVerilog. Proficiency in scripting languages like Python and Perl, as well as the ability to collaborate effectively with cross-functional teams, are essential skills for success in this position. Additionally, problem-solving abilities, strong communication skills, and the capacity to manage tasks independently with minimal supervision are key attributes we are looking for. With a minimum of 7 years of experience in mixed-signal verification and proficiency in tools like Virtuoso, Verilog, Verilog AMS, and Cadence tools such as xrun/ncsim/Vmanager, you will be well-equipped to meet the demands of this role. This position offers you the opportunity to work in a global organization, lead design and verification projects, and contribute to continuous improvements in design verification strategies, tools, methods, and flows. If you are passionate about shaping the future of electronics and seek a collaborative, innovative work environment, we invite you to apply for this exciting opportunity at our company. At Texas Instruments, we are committed to creating a better world through affordable electronics, and we value diversity and inclusivity in our workforce. Join us in engineering your future and being a part of our mission to drive innovation in the semiconductor industry. Please note that Texas Instruments is an equal opportunity employer and fosters a diverse and inclusive work environment. If you meet the qualifications outlined above and are interested in this position, we encourage you to apply.,

The culture at MarvyLogic is defined by its people. We foster a culture of passion for technology solutions that have a direct impact on businesses. We prioritize the pursuit of individual passions among our employees. Working with us offers you the opportunity to gain a comprehensive understanding of various industries and cutting-edge technologies. This exposure enables us to develop solutions that are not only forward-thinking but also highly impactful. Being a part of MarvyLogic can facilitate your personal growth, leading you towards a more fulfilling life. You should possess a Graduate Degree in Electrical/Electronics Engineering with over 10 years of experience (a post Graduate degree would be an added advantage). The job location is in Bengaluru/Bangalore. As a candidate for this position, you are expected to have a minimum of 10 years of experience in ASIC RTL Design and demonstrate proficiency in Verilog/System Verilog. Your expertise should extend to working with multiple clock and power domains. You should have a strong background in integrating and validating high-speed PCIe IP cores, including controllers and PHY SerDes. Experience with PCIe protocol analyzers and debugging is essential, as well as familiarity with PCIe driver and application software for both Linux and Windows environments. Your responsibilities will include RTL design and implementation of interface logic between PCIe controllers and DMA engines for high-performance networking applications. You will be required to create block-level micro-architecture specifications detailing interfaces, timing behavior, design tradeoffs, and performance objectives. Additionally, you will need to review vendor IP integration guidelines and ensure compliance throughout the design process. Running integrity check tools such as Lint/CDC/DFT/LEC/UPF to meet coding and implementation standards will also be part of your role. You will play a crucial role in the design verification process by reviewing test plans, coverage reports, writing assertions, and implementing design modifications to enhance verification quality. Furthermore, you will be involved in the physical implementation process by providing synthesis constraints, timing exceptions, and making design updates to achieve area, power, and performance targets. Key Responsibilities: - Collaborate effectively with multi-site teams - Conduct reviews of FPGA netlist releases (block/chip) - Demonstrate experience in the full ASIC product life cycle, including requirements, design, implementation, testing, and post-silicon validation.,

The job is located in Bangalore and requires 3-5 years of experience for 2 available positions. The primary responsibility involves RTL Design, with a focus on practical experience in RTL development using VHDL and/or Verilog. This includes functional and structural RTL design, design partitioning, simulation, regression, and collaboration with design verification teams. The ideal candidate should be familiar with the latest RTL languages and tools such as Modelsim, VCS, Design Compile, Prime Time, Linting tools, CDC tools, UPF, code coverage, System Verilog Assertion, among others. Desirable experience includes strong processor architecture knowledge, microarchitecture implementation, microprocessor integration, and low power design. Effective communication skills, teamwork abilities, self-direction, and time management skills are essential for this role. Preferred qualifications include developing RTL for multiple logic blocks of a DSP core, running various frontend tools for linting, clock domain crossing, and synthesis, collaborating with the physical design team on design constraints and timing closure, working with the power team on power optimization, and collaborating with the verification team on test plan, coverage plan, and coverage closure. The educational requirement for this position is a Bachelor's degree in Engineering, Information Systems, Computer Science, or a related field.,

The ideal candidate for this position should have 2 to 6 years of experience. The location for this job is Noida with 1-2 openings available. The educational requirement is a BA or B.Sc. in a technical field, English, or Communications. An added advantage would be having at least 1-3 years of writing or customer support experience in the electronics, networking, or computer industry, with experience in the semiconductor industry being a plus. The ideal candidate would possess a background in Mass Communication, Physics, or English, along with prior experience in technical writing. Familiarity with semiconductor-related technical jargon, software debuggers, and EDA tool scripts would be beneficial. The ability to edit or create web pages is also considered an advantage. Responsibilities for this role include writing, editing, proofreading, and preparing product manuals per release schedules. This will involve interacting with development engineering and technical marketing personnel to translate conceptual models into coherent reference manuals and user guides. The candidate will also collaborate with engineers, customer support, and product management to ensure the readability, technical accuracy, and completeness of the product documentation. Additionally, participation in developing departmental authoring guides, tools, and process improvements is expected. Desired talents and skills include excellent verbal and written communication skills in English, attention to company documentation and quality assurance standards, the ability to understand and translate technical information into customer documents, and a working knowledge of programming languages, Verilog, formal verification, or logic synthesis. Proficiency in publication tools such as Frame Maker, MS Word, Visio, Eclipse/Web help, as well as familiarity with DITA, CMS, and wiki- or database-based authoring, is desirable. Excellent interpersonal skills and positive teamwork abilities are necessary for conducting interviews with various users and technical staff to gather data for documentation. The ideal candidate should be solution-oriented, self-motivated, and capable of managing schedules and priorities across multiple projects.,

You are a senior FPGA expert with over a decade of experience in architecting, implementing, and optimizing complex digital systems. Your role will involve owning the design and delivery of mission-critical FPGA-based solutions. You will be responsible for the architecture, design, and implementation of complex FPGAs (Xilinx/Intel), as well as defining and driving system-level hardware architecture in collaboration with cross-functional teams. Additionally, you will lead timing closure, constraint management, and interface integration (PCIe, DDR, high-speed serial), while optimizing performance, power, and resource utilization. Your role will also include providing technical leadership, conducting peer reviews, and mentoring junior engineers. To be successful in this role, you should have 10+ years of hands-on FPGA design experience, deep expertise in Verilog/VHDL/SystemVerilog, and a strong track record of successful tape-outs/productization. Proficiency with tools such as Vivado, Quartus, Synplify, ModelSim, or similar is required. Familiarity with embedded systems, SoCs, or HW/SW integration is considered a plus. The ideal candidate is a self-starter who excels at solving challenging problems, shaping architecture, and delivering production-quality hardware. In this role, you will have the opportunity to work on innovative, performance-critical systems, while enjoying autonomy, ownership, and a voice in architecture decisions. If you are interested or know someone who fits this description, please apply by sending your details to himabindu.jeevarathnam@acldigital.com.,

As a Functional Verification Engineer at AMD in Hyderabad, you will be responsible for verifying the functionality of complex System on Chip (SOC) designs using industry-standard verification methodologies. With 4-10 years of experience, you will play a key role in ensuring the quality and reliability of ASIC designs. You should be proficient in UVM (Universal Verification Methodology) and have a strong command of Verilog or SystemVerilog. Additionally, knowledge of AMBA Bus Protocols is essential for this role. Your expertise in functional verification, design verification (DV), and ASIC verification will be crucial in meeting the verification goals of the projects. Working closely with cross-functional teams, you will have the opportunity to contribute to cutting-edge technologies and innovative solutions. This position requires immediate to 45 days notice period availability. If you are passionate about verification engineering and have a solid foundation in AMBA, SystemVerilog, SOC, Verilog, and other relevant skills, we invite you to join our team at AMD and be part of our dynamic work environment. Join us in shaping the future of technology with your verification expertise.,

Location: Bengaluru (Client Site) Job Type: Full-time Experience: 3-7 years Notice Period: 0-15 days (immediate joiners preferred) Embedded Engineer Advantal Technologies is seeking for the following positions: Experience band 3-7 years (We can have one lead of experience around 7 and rest 3 years) Experience in C programming on Bare Metal Experience on development on Xilinx MPSoC (preferable ZCU 106/104) Hands on experience on Xilinx Vitis Desirable to have experience on MISRA C coding guidelines Desirable to have experience on DO-178C Experience on device driver development Experience on protocols: I2C, SGMII, UART, SPI Desirable to have experience on security aspects of authentication, certificates, encryption/decryption FPGA Engineer: Experience band 3-7 years (We can have one lead of experience around 7 and rest 3 years) Experience in RTL coding using Verilog Experience on development on Xilinx MPSoC (preferable ZCU 106/104) Hands on experience on Xilinx Vivado and Vitis Desirable to have experience on MISRA C coding guidelines Desirable to have experience on DO-254 Desirable to have experience on Microblaze Desirable to have experience on security aspects of authentication, certificates, encryption/decryption Technical Lead: Minimum 8 years of experience. Minimum of 2 years experience in leading teams Excellent understanding of embedded system development and real-time application development. Hands-on experience in bare-metal code development using C, over an embedded platform Hands-on experience of FPGA design flow and experience digital design development using Verilog HDL. Experience in DO-178C compliance and certification Understanding of software development using API, and networking protocols Should be able to address the non-functional aspects like performance, scalability, reliability, availability etc. Should have a good understanding of the security aspects of the applications like authentication, authorization, public key infrastructure, SSL, certificates, etc. Good hands-on with design, coding, and resolving the technical issues Good experience in review process architecture, design, code. Fair understanding and working experience in Qt, C / Java/python programming language Technical hands on with tools and related framework Strong interpersonal and excellent communication skills Testers: Minimum 3 years of experience in testing of embedded system Experience in test case design and related execution. Experience in testing Zynq ultrascale MPSoC using Xilinx Vivado Experience in writing testbench using Verilog/System Verilog Experience in QuestaSim or equivalent simulation tool, Simulation environment creation, Good experience in code coverage, branch coverage If interested, please contact hr@advantal.net

Role : RTL Software Testing Engineer Role does not involve Silicon RTL development and neither any HW flow or testing. Work Location: Hyderabad Qualification: B.E / B. Tech or M. Tech in ECE / CS / EEE Experience Level : Minimum 2+ years Job Description Excellent Knowledge in Tcl, Python scripting. to test cases.(This would be the primary responsibility) Vivado testing of synthesis tool and other stages. RTL Coding in Verilog, System Verilog, or VHDL Strong understanding of FPGA flow, Logic design, Digital design etc. Knowledge in Xilinx FPGA architecture Communication Skills: Ability to communicate technical information in an organized and understandable fashion. Customer oriented approach with a demonstrated concern and desire to work with and assist customers. Good organizational skills with the ability to multitask, prioritize, and track many activities. Outstanding oral and written communication skills.

SMTS SILICON DESIGN ENGINEER T HE ROLE : This role is for a verification engineer or a hardware modelling engineer to maintain and enhance Graphics verification environment. THE PERSON: A successful candidate should have good understanding of both hardware and software concepts. K EY RESPONSIBLITIES : Maintain the verification infrastructure Implement low level drivers for the verification environment Implement new features in the verification environment and the driver Debug and support issues from different stakeholders P REFERRED EXPERIENCE : Experience in verification or driver development of complex compute IPs Experience with System C/C++ based verification environments Experience with Graphics driver development Experience with open cl/open gl is desirable Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-NS1

MTS GFX Verification Role: We are currently seeking a highly skilled verification engineer for GFX Verification team. Responsibilities: In this role, he/she would be responsible for verification of GPU Verification by meeting the demands of the constantly evolving project schedule. The successful candidate will be a member of the GFX team. He/she will demonstrate passion towards design, design verification, be a teammate, a problem solver with independence, creativity, and interpersonal skills. Working with all partners such as lead architects and block design teams to understand features to be implemented and verified. Developing robust test plan for both synthetic testing and real workload trace Debug verification test failures, working with the design team to accurate defects. Make sure AMD next generation GFXIP can meet performance/power/function expectation. Requirements: Must have Min 8 years of experienced in ASIC verification. Must be proficient in Verilog and System Verilog language Must be good at C/C++ programming and working in Linux and Windows environments. Must have ASIC design knowledge and be able to debug Verilog RTL code using simulation/emulation tools and do test plan, test creation and triage, coverage, and assertion etc. Be proficient of script language like Perl, Python. Must demonstrate strong analytical thinking and problem-solving skills with an excellent attention to detail. Must have good English hearing, speaking, reading, and writing capabilities. Must have good teamwork and interpersonal skills. Graphics pipeline experience is preferred. Good knowledge of computer architecture is preferred. Must be a self-starter, and able to independently drive tasks to completion. Good teamwork and communications skills are required. Academic credentials: B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering / Computer Engineering with Digital Systems/VLSI as major with 8+ Years of Exp Location: Bangalore, India #LI-NS1

FPGA Engineer by Advantal Technologies | Jul 25, 2025 | Jobs | 0 comments Location: Bengaluru (Client Site) Job Type: Full-time Experience: 3-7 years Notice Period: 0-15 days (immediate joiners preferred) No. of Positions: 1 Lead & 4 Engineers About the Role: We are seeking a skilled FPGA Engineer with 3 7 years of experience in RTL design using Verilog, along with expertise in Xilinx MPSoC platforms, MicroBlaze processor development, and embedded system security aspects such as authentication, encryption/decryption, and certificates. The ideal candidate will play a key role in architecting and implementing secure, high-performance digital logic systems. Requirement: Experience band 3-7 years Experience in RTL coding using Verilog Experience on development on Xilinx MPSoC (preferably ZCU 106/104) Hands-on experience with Xilinx Vivado and Vitis Desirable to have experience with MISRA C coding guidelines Desirable to have experience with DO-254 Desirable to have experience with Microblaze Desirable to have experience in security aspects of authentication, certificates, encryption/decryption How to Apply: If you are passionate about embedded systems and meet the above requirements, we would love to hear from you. For more information, connect with us at : +91 91312 95441 Location: Bengaluru (Client Site) Job Type: Full-time Experience: 3-7 years Notice Period: 0-15 days (immediate joiners preferred) No. of Positions: 1 Lead & 4 Engineers About the Role: We are seeking a skilled FPGA Engineer with 3 7 years of experience in RTL design using Verilog, along with expertise in Xilinx MPSoC platforms, MicroBlaze processor development, and embedded system security aspects such as authentication, encryption/decryption, and certificates. The ideal candidate will play a key role in architecting and implementing secure, high-performance digital logic systems. Requirement: Experience band 3-7 years Experience in RTL coding using Verilog Experience on development on Xilinx MPSoC (preferably ZCU 106/104) Hands-on experience with Xilinx Vivado and Vitis Desirable to have experience with MISRA C coding guidelines Desirable to have experience with DO-254 Desirable to have experience with Microblaze Desirable to have experience in security aspects of authentication, certificates, encryption/decryption How to Apply: If you are passionate about embedded systems and meet the above requirements, we would love to hear from you. For more information, connect with us at : +91 91312 95441