Staff Design Engineer

• We are seeking a highly experienced Staff Design Engineer with 10+ years of expertise in RTL design and digital signal processing for our Bengaluru location (max 30 days notice period).
• The ideal candidate will be responsible for designing, developing, and integrating custom DSP components such as filters, FFTs, and control logic for Aevas advanced 4-D Lidar processing chip across ASIC and FPGA platforms.
• The role involves creating micro-architecture specifications, writing and validating SystemVerilog RTL code, and ensuring designs meet stringent performance, low-power, and robustness requirements.
• The engineer will collaborate with architects, verification, and system software teams to achieve SoC functional and performance goals.
• Strong proficiency in DSP architectures, AMBA protocols, and RTL coding is required, along with proven ability to deliver high-quality designs.
• Preferred skills include Matlab /NumPy/C/C++, high-speed SerDes, FPGA-based validation, and post-silicon bring-up.

Skills