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Mirafra
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STA Engineers

STA Engineers

3 - 8 years

|

10 - 14 Lacs

Posted:1 day ago| Platform:

Apply

Skills Required

asic development sta primetime debugging perl matlab asic c++ physical design python upf timing analysis uvm vhdl verilog formal verification timing closure fpga tcl scripting embedded systems linux placement tcl system verilog

Work Mode

Work from Office

Job Type

Full Time

Job Description

Experience with STA using Primetime and PTPX required
Proficient in constraint generation.
Experience of multiple power domain implementation with complex UPF/CPF definition required
Formal verification experience (Formality/Conformal)
Perl/Tcl scripting is required
Strong problem solving and ASIC development/debugging skills.
Experience with CPU micro-architecture and their critical path.
Low power implementation techniques experience.
High speed CPU implementation.
Place and route tool experience.
Constraint management tool and Verilog coding experience

Experience (years) : 3+ Year

Education Qualification:

BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent

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