SMTS/Principal ASIC Design Engineer- CSI/DSI Design and Integration

As an experienced ASIC RTL Design Engineer at MarvyLogic, you will play a crucial role in designing cutting-edge solutions that are futuristic and impactful. Your expertise in ASIC RTL Design and proficiency in Verilog/System Verilog will be key assets in this role. You will have the opportunity to work with multiple clock and power domains, integrating and validating various MIPI cores such as CSI/DSI/DPHY/CPHY/other MIPI cores. Your responsibilities will include debug tasks related to CSI/DSI, RTL design and implementation of CSI/DSI controllers, and creating block-level micro-architecture specifications. Key Responsibilities: - Utilize your 10+ years of ASIC RTL Design experience to create high-quality designs - Work on integration and validation of various MIPI cores including CSI/DSI - Review vendor IP integration guidelines and ensure compliance throughout the design flow - Collaborate with multi-site teams effectively - Participate in design verification and physical implementation processes to meet area, power, and performance goals - Responsible for reviewing FPGA netlist releases and contributing to ASIC product life cycle activities Qualifications Required: - Bachelor's degree in Electrical/Electronics Engineering (Graduate degree preferred) - Proficiency in Verilog/System Verilog - Experience with CSI/DSI debug and implementation - Familiarity with tools like Lint, CDC, DFT, LEC, and UPF - Strong understanding of design verification processes and synthesis constraints Join MarvyLogic to be a part of a culture that values passion for technology solutions and individual growth. Your contributions will not only impact businesses but also help you evolve as a professional, leading to a more fulfilling life.,