32 Physical Implementation Jobs

Alternate Job Titles: Principal Memory Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an accomplished and innovative engineer passionate about pushing the boundaries of embedded memory design. With a strong foundation in electrical and electronics engineering, you thrive in dynamic environments where co...

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

1. Exp. in PnR of a big SoC AMS with many partitions and not only blocks level implementation 2. Involve in a project using FDSIO 22nm technology node or equivalent (not bulk technology) 3. Implementation of a project with the full Cadence tools 4. Have worked on complex Hard macros with SerDes and/or critical in timing and area 5. Having experience in Flip-Chip SoC bump Ios) 6. Have exercised all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file

Role Overview: You will be responsible for ASIC RTL design with 10+ years of experience and proficiency in Verilog/System Verilog. Your role will involve working with multiple clock and power domains, integrating and validating various MIPI cores, debugging, and implementing CSI/DSI controllers. Additionally, you will be creating micro-architecture specifications, reviewing vendor IP integration guidelines, running integrity check tools, and participating in design verification and physical implementation processes. Key Responsibilities: - Possess 10+ years of ASIC RTL Design experience and proficiency in Verilog/System Verilog - Work with multiple clock and power domains - Integrate and val...

As a Qualcomm Hardware Engineer, your role involves planning, designing, optimizing, verifying, and testing electronic systems. You will work on a variety of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop solutions and meet performance requirements. Key Responsibilities: - Utilize your 3 to 5 years of experience in static timing analysis, constraints, and other physical implementation aspects - Demonstrate a solid understanding of industry standard tools such as PT, Tempus, and familia...

Division: Artificial Intelligence Solutions Employment Status: Exempt Salary Grade: 108 Shift Requisition ID: 75816 Please be aware that if you are selected to formally interview for an internal position you will be required to notify your current manager. Please refer to the Employee Transfers Guidelines posted on Skylink. Responsibilities Digital design specification, design, analysis, and HDL (Verilog) coding Behavioral modeling of analog and mixed signal circuits Digital back-end: synthesis, physical implementation (prep for P&R), static timing, scan insertion, etc. Verification of digital sub-systems, mixed-signal sub-systems, and the entire chip using a combination of digital models/RT...

Job Details Job Description: Altera is looking for a talented and driven Silicon Design Engineering Manager to lead and inspire a multidisciplinary silicon design team. In this critical role, you will manage design engineers across multiple functional domainsincluding logic design, verification, circuit design, and physical implementationfor cutting-edge IP, subsystems, SoCs, and discrete chips. You'll be at the forefront of Altera's product innovation, driving high-quality silicon solutions that meet power, performance, area, and cost objectives. Key Responsibilities Lead and manage a team of silicon design engineers across multiple disciplines and development phases. Drive end-to-end devel...

In this role with the MPU Engineering team at NXP, you will be responsible for leading the product execution for Automotive/Consumer/Industrial ASIL-B/D SoCs. This includes working with architects and systems engineering to define the part, generating and analyzing data to make right and cost-effective architecture decisions, and collaborating with IP, Technology, and packaging partners to assess the best IP/packages and technology options. Furthermore, you will work with various SoC functions to understand and resolve inter/intra functional handoff challenges, oversee definition management, and ensure implementation compliance with requirements. Your role will also involve close collaborati...

As a Qualcomm Hardware Engineer, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems for cutting-edge products. Working closely with cross-functional teams, you will develop innovative solutions to meet performance requirements. **Key Responsibilities:** - 5 to 10 years of experience in static timing analysis, constraints, and other physical implementation aspects - Proficiency in industry standard tools PT, Tempus, GENUS, Innovus, ICC, etc. - Expertise in solving extreme critical timing bottleneck paths and p...

OUR STORY At ST, we believe in the power of technology to drive innovation and make a positive impact on people, business, and society. We are a global semiconductor company, and our advanced technology & chips forms the hidden part of the world we live in today. When you join ST, you will be part of a global business of more than 115+ nationalities and present in 40 countries, 50,000+, diverse and dedicated creators & makers of technology around the world! Developing technologies takes more than talent: it takes amazing people who understands collaboration and respect. People with passion and desire to disrupt the status quo, push boundaries and drive innovation whilst unlocking your own po...

Role Overview: You will be responsible for EMIR signoff at block and SoC level, as well as having a good understanding of IR/Power-Domain-Network signoff at SOC & block level. Your experience with RHSC tool and proficiency in Python scripting will be essential in this role. Additionally, your knowledge of Physical Implementation including Synthesis and Place & Route will be crucial. Effective communication skills, along with strong analytical and problem-solving abilities, will also be key in this position. Key Responsibilities: - Perform EMIR signoff at block and SoC level - Demonstrate a good understanding of IR/Power-Domain-Network signoff at SOC & block level - Utilize RHSC tool effectiv...

As an experienced ASIC RTL Design Engineer at MarvyLogic, you will be responsible for designing cutting-edge solutions that impact various industries. Your role will involve working with multiple clock and power domains, integrating and validating MIPI cores, debugging, and implementing CSI/DSI controllers. Your expertise in Verilog/System Verilog will be crucial in creating micro-architecture specifications, reviewing vendor IP integration guidelines, and running integrity check tools to ensure compliance with coding standards. Additionally, you will play a key role in the design verification and physical implementation processes to meet performance goals. **Key Responsibilities:** - Utiliz...

Join our ambitious team of silicon and hyperscale data center systems experts as a Physical Design Engineer. Our mission is to revolutionize the performance and scalability of next-generation distributed computing infrastructure. You will have the opportunity to work on groundbreaking products and collaborate with talented hardware and software engineers to create disruptive infrastructure solutions that excite our customers. We are seeking talented engineers experienced in physically implementing large-scale networking and computing semiconductor products. You will be part of a dynamic startup environment and contribute to the full lifecycle of complex chip development, from CAD tool flow s...

Qualcomm India Private Limited is seeking a Hardware Engineer to join the Engineering Group. As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Your role will involve launching cutting-edge, world-class products by collaborating with cross-functional teams to develop solutions that meet performance requirements. The ideal candidate should have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 3 years of Hard...

As a Senior ASIC Physical Design Engineer at Synopsys, you will play a crucial role in shaping the future of the semiconductor industry by driving innovations in IC design and physical implementation. Your expertise in high-performance digital design, low-power design, and high-speed clock design will be instrumental in developing cutting-edge solutions for creating high-performance silicon chips. You will collaborate with cross-functional teams to streamline the physical design process, enhance product offerings, and exceed customer expectations. Your responsibilities will include floor planning, developing timing constraints, physical synthesis, clock tree optimization, routing and extract...

Qualcomm India Private Limited is a leading technology innovator that aims to create a smarter, connected future for all. As a Qualcomm Hardware Engineer, your responsibilities will include planning, designing, optimizing, verifying, and testing electronic systems. You will work on a range of systems including circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to develop cutting-edge, world-class products. Collaboration with cross-functional teams will be essential to develop solutions and meet performance requirements. To be eligible for this role, you must have a Bachelor's degree in Computer Science, Electrical/...

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This includes working on circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaboration with cross-functional teams to develop solutions and meet performance requirements is a key aspect of this role. M...

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation. As a Qualcomm Hardware Engineer, your responsibilities will include planning, designing, optimizing, verifying, and testing electronic systems. You will work on a variety of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop solutions and meet performance requirements. The ideal candidate for this role should ...

Alternate Job Titles: ASIC Physical Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced Physical Design Engineer with a passion for implementing and performing signoff verifications of digital blocks using ASIC design flow (Gate2GDSII). You thrive in dynamic environments an...

These breakthroughs are ushering in the Era of Smart Everything And were powering it all with the worlds most advanced technologies for chip design and software security If you share our passion for innovation, we want to meet you, Our Silicon Design & Verification business is all about building high-performance silicon chipsfaster Were the worlds leading provider of solutions for designing and verifying advanced silicon chips And we design the next-generation processes and models needed to manufacture those chips We enable our customers to optimize chips for power, cost, and performanceeliminating months off their project schedules, You Are: You are a highly skilled and passionate engineer ...