Posted:2 days ago|
Platform:
On-site
Full Time
Hello Connections!!!,
Greetings from ElevarSoC
We are hiring for Memory Layout Engineer with 3+Years of Experience for Banglaore location.
hashtag#Bangalore
Immediate / 2 weeks preferred
hashtag#Below the jd
Technical Skill:
Experience in Memory/Custom Layout design.
Memory Leafcell layout library design from scratch including top level integration.
Good knowledge on different types of memory architectures.
Good knowledge in optimized layout design for better performance.
Sound knowledge & hands on experience in Finfet technology, layout design and DRC limitations.
Proficient in physical verification flow & debug, like DRC, LVS, ERC, Boundary conditions.
Proficient in Cadence Virtuoso layout editor and Calibre physical verification flow
Apply Now!!!
Share your resume to rukshana.khatoon@elevarsoc.com
hashtag#Bangalorejobs hashtag#jobs # Memory Layout hashtag#Engineer hashtag#Custom hashtag#DRC hashtag#LVS hashtag#ERC # Cadence hashtag#Cell Aware #hashtag#Physical Verification Flow hashtag # Join our team
ElevarSoC Technologies
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