205 Fpga Design Jobs

What You'll Do Cisco SiliconOne team is looking for an expert and talented ASIC Engineer. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products. Responsibilities Looking for a Front-end Design ASIC Engineer. Architectural work: in-depth understanding of the architecture, and identification of problems and solutions. All aspects of implementation: specification, design, timing-analysis, power-optimization, flow automation, optimization of the logic for low power and area; highlighting issues and standard methodologies for power and area optimization. Document and improve standard methodologies to make product successful. Who You Are Worked in architecture and definition of high-scale, high-performance ASICs. Validated experience in implementation: specification, RTL design, lint, cdc, timing analysis, formal verification, system testing. Validated experience in flow automation (scripting, Makefiles, etc), and establishing guidelines for the team. Good interpersonal skills, and validated leadership to accurately describe issues/improvements and lead team for on-time completion. BS/MS and 5+/3+ years respectively of hands-on experience in large-scale, high-performance ASIC BS/MS should be in EE/CS. Minimum Qualifications RTL development (Verilog, SystemVerilog, VCS, Spyglass, CDC, Formal verification) Experienced in system debug and SW/HW bringup, system validation of silicon towards FCS. Gate-level understanding of RTL and Synthesis Programming/scripting skills (C, C++, Perl) Hardware Emulation Platforms and tools (such as EVE, Veloce) Good written/verbal interpersonal skills and leadership skills. Who You'll Work With Come join us and be part of the Cisco SiliconOne team and take part in crafting Cisco's groundbreaking Enterprise and Service Provider solutions by crafting some of the most complex chips being developed in the industry with the opportunity to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, telemetry, security, etc). Our group offers a rare combination of a startup culture with the benefits of working for the top tier networking company in the world!

What You'll Do Cisco SiliconOne team is looking for an expert and talented ASIC Engineer. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products. Responsibilities Looking for a Front-end Design ASIC Engineer. Architectural work: in-depth understanding of the architecture, and identification of problems and solutions. All aspects of implementation: specification, design, timing-analysis, power-optimization, flow automation, optimization of the logic for low power and area; highlighting issues and standard methodologies for power and area optimization. Document and improve standard methodologies to make product successful. Who You Are Worked in architecture and definition of high-scale, high-performance ASICs. Validated experience in implementation: specification, RTL design, lint, cdc, timing analysis, formal verification, system testing. Validated experience in flow automation (scripting, Makefiles, etc), and establishing guidelines for the team. Good interpersonal skills, and validated leadership to accurately describe issues/improvements and lead team for on-time completion. BS/MS and 8+/6+ years respectively of hands-on experience in large-scale, high-performance ASIC BS/MS should be in EE/CS. Minimum Qualifications RTL development (Verilog, SystemVerilog, VCS, Spyglass, CDC, Formal verification) Experienced in system debug and SW/HW bringup, system validation of silicon towards FCS. Gate-level understanding of RTL and Synthesis Programming/scripting skills (C, C++, Perl) Hardware Emulation Platforms and tools (such as EVE, Veloce) Good written/verbal interpersonal skills and leadership skills.

Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Emulation Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will analyze, design, code, and test multiple components of application code across one or more clients. You will perform maintenance, enhancements, and/or development work in a dynamic environment, contributing to the success of the projects. Roles & Responsibilities:- Expected to be an SME, collaborate, and manage the team to perform.- Responsible for team decisions.- Engage with multiple teams and contribute on key decisions.- Provide solutions to problems for their immediate team and across multiple teams.- Lead and mentor junior team members.- Conduct code reviews to ensure code quality and adherence to coding standards. Professional & Technical Skills: - Must To Have Skills: Proficiency in Emulation platform like Palladium/Zebu/Veloce/HAPS.- Strong understanding of SOC Architecture- Experience with debugging using any Emulation Palladium/Zebu/Veloce/HAPS platform.- Hands-on experience with ARM (A/M) architecture.- Knowledge of C language. Additional Information:- The candidate should have a minimum of 5 years of experience in Emulation.- This position is based at our Bengaluru office.- A 15 years full-time education is required. Qualification 15 years full time education

We are looking for a skilled RTL Design Engineer with 3 to 7 years of experience to join our team at Capgemini Technology Services India Limited. The ideal candidate will have a strong background in IT Services & Consulting and be proficient in RTL design. Roles and Responsibility Design and develop high-quality RTL code for various projects. Collaborate with cross-functional teams to identify and prioritize project requirements. Develop and maintain technical documentation for RTL designs. Troubleshoot and debug issues related to RTL code. Participate in code reviews and ensure adherence to coding standards. Stay updated with industry trends and emerging technologies in RTL design. Job Requirements Strong understanding of digital logic design principles and methodologies. Proficiency in programming languages such as Verilog or VHDL. Experience with RTL design tools and software. Excellent problem-solving skills and attention to detail. Ability to work effectively in a team environment. Strong communication and interpersonal skills.

-Lead the Architecture, Design and development of processor L2 and LLC (Last Level Cache) for high-performance IBM Systems. - Design and architect L2 cache and LLC as driven by capacity, latency, bandwidth, and RAS requirements. - Develop the features, present the proposed architecture in the High level design discussions - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise -4+ years of relevant experience - At least 1 generation of processor L2 cache or LLC design delivery leadership. - Expertise in cache coherence protocols for symmetric multiprocessors (SMP), covering both chip SMP and multi-socket SMP. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. - Experience in logical and physical design of caches including directories (tags, set associative memories), data SRAM, design for low latency, multiple parallel finite state machine design, deadlock-free designs.

VHDL/FPGA Design Engineer RTL design, simulation, test bench development & debugging using VHDL. Experience with Xilinx Vivado, timing constraints & synthesis tools. SoC integration, communication protocols & strong HDL debugging skills.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: FPGA Design. Experience: 3-5 Years.

Lead the Architecture, Design and development of processor MMU (Memory management unit) for high- performance IBM Systems. - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the MMU feature enhancements. - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 to 15 years of relevant experience - At least 1 generation of experience in the memory management/ memory controller delivery leadership. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. Good understanding of industry trends & advances in - 8 to 15 years of relevant experience - At least 1 generation of experience in the memory management/ memory controller delivery leadership. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. Good understanding of industry trends & advances in architecting high bandwidth memory solutions.

RGreetings!!!!! We are looking for a Engineer / Sr. Engineer _ FPGA Design _ Bangalore location for a leading Indian multinational in Electronics System Design & Manufacturing. Job Responsibilities: High-speed digital architecture design (FPGA based) FPGA design using Xilinx devices & tools (Vivado/ISE) Implementing DSP algorithms on FPGA Hands-on with protocols: JESD204, LVDS, Aurora, UART, SPI, I2C Perform Static Timing Analysis (STA), synthesis, placement, routing & floorplanning Apply design constraints for timing closure Develop test benches for verification & validation Collaborate with cross-functional teams for new product development Requirements: 4 to 8 years of FPGA design experience Strong in RTL to FPGA implementation & onboard testing Experience in DSP algorithm-to-hardware conversion Good knowledge of verification, validation & debugging methods If your interested share with the below details to uma@bvrpc.com Please share your updated resume along with: Current CTC Expected CTC Notice Period

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Collaborate with design and verification teams to understand digital design specifications and ensure comprehensive verification coverage. Develop and execute verification plans for ASIC/FPGA designs using directed tests and/or SystemVerilog with UVM methodologies. Build and maintain testbenches, verification components, and assertion-based verification structures to validate complex digital designs. Perform simulation, debugging, and coverage analysis to ensure functional correctness and compliance with design requirements. Contribute to the automation of verification flows through scripting (Python, Perl, Bash) to improve productivity and consistency. Work in Unix/Linux environments for development, simulation, and regression testing activities. Document verification strategies, results, and maintain clear communication with cross-functional teams to support project milestones. Actively participate in code reviews and contribute to continuous improvement of verification methodologies and best practices. Skills Must have 6+ years of experience. Strong in digital design. Skills in ASIC / FPGA verification (directed test or System Verilog / UVM) A good knowledge of simulation flow Good basis in scripting Python, Perl, Bash. Proficiency in Unix environment. Good communication skills Nice to have Bachelor's/Master's in ECE

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: RTL coding.Experience: 3-5 Years.

At Atos, we are a global leader in digital transformation, employing around 78,000 individuals and generating an annual revenue of approximately 10 billion. As the top cybersecurity, cloud, and high-performance computing provider in Europe, we offer customized end-to-end solutions to various industries across 68 countries. We are at the forefront of decarbonization services and products, dedicated to providing our clients with secure and sustainable digital solutions. Atos operates as a SE (Societas Europaea) and is listed on Euronext Paris. Our mission at Atos is to shape the future of the information space. Through our expertise and services, we facilitate the advancement of knowledge, education, and research in a diverse cultural context, fostering scientific and technological excellence. Globally, we empower our customers, employees, and broader communities to thrive and progress sustainably within a secure information environment. We are currently seeking a skilled FPGA Design Engineer to join our team in Bangalore (Whitefield) with a minimum of 3 years of experience. The ideal candidate should hold a Bachelor's Degree (BE/BTech) or a Master's Degree (ME/MTech) in Electronics. Key Responsibilities: - Design FPGAs for Server Motherboards based on specified requirements - Create detailed design documentation for FPGA implementation - Develop test benches and conduct verification processes - Perform on-board validation of FPGAs Qualifications and Experience: - Educational background in BE/BTech/ME/MTech in Electronics - Minimum of 3 years of experience in FPGA development - Proficiency in FPGA design using Verilog/VHDL - Hands-on experience in FPGA design implementation and verification - Expertise in timing closure and setting constraints - Familiarity with Xilinx, Altera/Intel, and Lattice tools - Strong problem-solving and debugging skills - Ability to collaborate effectively with global teams across different geographies At Atos, diversity and inclusion are integral to our organizational culture. We are committed to fostering a fair work environment for all individuals. Additionally, our company is recognized for its leadership in Environment, Social, and Governance (ESG) criteria. Learn more about our Corporate Social Responsibility (CSR) initiatives and our dedication to sustainability. If you are looking to shape your future in a dynamic and inclusive work environment, consider joining Atos. Choose a career that aligns with your values and aspirations.,

Hughes Systique Corporation (HSC) is a leading global digital solutions and service provider, currently expanding its team in Dehradun, Uttarakhand. This presents an excellent opportunity for FPGA Design Engineers to engage in cutting-edge projects with a multinational company situated in Dehradun. IKSANA is actively supporting HSC in this recruitment drive. About Hughes Systique Corporation (HSC): HSC is a multinational company specializing in delivering innovative solutions in Networking, AI & ML, Retail, Automotive, IoT, Blockchain, and Security. The team at HSC comprises world-class domain experts, system architects, and engineers collaborating with global clients on challenging, innovative, and impactful projects. Role: FPGA Design Engineer Location: Dehradun (Full-Time, On-Site) Experience: 3-6 Years Type: Permanent Openings: 2 Note: This position is based in Dehradun and welcomes candidates currently located in Dehradun or professionals originating from Dehradun who are seeking to relocate back. Required Skills: - FPGA Design and Development - Proficiency in Verilog and/or VHDL - Experience with Xilinx Vivado tools - Familiarity with ModelSim and UVM Educational Background: Candidates should hold a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Role Overview: HSC is in search of experienced FPGA developers to join their Dehradun team, focusing on the design, development, and optimization of complex FPGA-based systems for various applications. The ideal candidate will possess a robust background in FPGA design, verification, and implementation, along with experience in collaborating with hardware and software engineers to integrate FPGA designs into larger systems. Exposure to the latest FPGA technologies and techniques is highly desirable. If you possess significant expertise in FPGA design and aspire to be a part of a company that prioritizes learning, innovation, and career growth, we are eager to connect with you. To Apply: Please submit your CV to aayushi@outlookwork.com Contact Person: Aayushi Sharma Contact Number: +91 80063 07272,

At Cadence, we are always on the lookout for leaders and innovators who are passionate about making a difference in the world of technology. As a Design Engineering Manager, you will be based in Bangalore and play a crucial role in Cadence's electronic design endeavors. With over 30 years of expertise in computational software, Cadence is dedicated to transforming design ideas into reality through its Intelligent System Design approach, offering a range of software, hardware, and IP solutions for various market applications. Working at Cadence comes with its own set of advantages: - You will have the opportunity to work with cutting-edge technology in an environment that fosters creativity, innovation, and impactful contributions. - Our employee-friendly policies prioritize the well-being and professional development of our team members, offering ample learning opportunities and recognizing individual successes. - The "One Cadence - One Team" culture promotes collaboration across teams to ensure customer success. - There are multiple avenues for learning and development tailored to individual interests and requirements. - You will collaborate with a diverse team of dedicated individuals who strive for excellence every day. In this role, you will join the Post Silicon Physical Layer Electrical Validation team in Bangalore and lead efforts in developing infrastructure for pre-silicon validation and post-silicon validation on Cadence's High-Speed SERDES Test chips. Your responsibilities will include designing the necessary hardware and software architecture for testing the test chips, defining rigorous test plans, executing tests, and generating detailed test reports based on the results. Key Qualifications we are seeking in potential candidates include: Minimum Qualifications: - 6-10 years of experience with a B.Tech degree or 4-8 years with an M.Tech degree in Post-Silicon Physical Layer Electrical Validation. - Profound experience in Physical Layer electrical validation of at least one High-Speed SERDES protocol such as PCIe, USB, DP, Ethernet, SRIO, JESD204, DDRIO, etc. - Strong hands-on experience with lab equipment like Oscilloscopes, Network Analyzers, Bit Error Rate Testers (BERT), etc. Preferred Qualifications: - Experience in managing small teams and leading post-silicon validation efforts for full projects. - Prior experience in FPGA Design, PCB schematic and layout design, prototyping, and Pre-Silicon IP/SoC Physical Layer Electrical Validation. - Familiarity with Verilog RTL coding, FPGA coding, Labview, Python, C/C++, and TCL. - Experience in conducting hiring interviews and mentoring new team members. - Passion for analog and digital electronic circuit design and signal processing aspects. At Cadence, we are committed to tackling challenges that others can't. Join us in our mission to make a meaningful impact through our work.,

As an Electrical Design Engineering Manager in the Systems Integration Group (SIG) at Micron Technology, you will lead a team of electrical engineers in developing semiconductor manufacturing test equipment. Your responsibilities will include supervising a team of electrical design engineers, evaluating workloads, and prioritizing resources for developing new electrical designs. Collaborating with cross-functional teams, planning and implementing project deliverables, deriving PCB design specifications, designing analog circuits, and FPGA design using HDL will be crucial aspects of your role. Additionally, you will need to provide technical guidance to management, support prototype qualification by customers, and continuously assess design processes for improvements. To qualify for this role, you must hold a BS or MS degree in Electrical Engineering or a related field with a minimum of 8 years of experience in electrical engineering developing hardware/PCB designs. Prior experience in leading technical and organizational goals of an engineering team, proficiency with EDA tools like Siemens Xpedition, and working knowledge of electronic circuit simulation tools and PCB layout are required skills. Preferred additional skills include experience with FPGA/ASIC design HDL, familiarity with communication protocols, and knowledge of scripting languages for automation. Join us at Micron Technology, a world leader in memory and storage solutions, where innovation and collaboration drive our mission to transform how the world uses information. Visit micron.com/careers for more information or contact hrsupport_india@micron.com for assistance with the application process. Micron Technology prohibits the use of child labor and complies with all applicable laws, rules, regulations, and international labor standards. Candidates are encouraged to enhance their application materials with AI tools, ensuring accuracy and honesty in reflecting their qualifications. Be cautious of unsolicited job offers and verify the authenticity of communications claiming to be from Micron by checking the official Micron careers website.,

As an experienced FPGA Design Engineer in the field of wireless communication, you will be joining the core R&D team of our client, a leading company specializing in optical wireless communication (OWC) and LiFi technology. Your primary responsibility will be to work on high-speed wireless communication systems, starting from the conceptualization phase all the way to integration. Your key responsibilities will include FPGA design and development utilizing VHDL, Verilog, or SystemVerilog. You will focus on implementing high-speed digital designs with an emphasis on modulation/demodulation techniques such as QPSK, QAM, and OFDM. Additionally, you will lead technical project teams to ensure timely delivery within budget constraints. Developing communication system architectures for wireless networks and staying abreast of FPGA advancements and multi-core microprocessor platforms will also be part of your role. To excel in this position, you are required to hold a Master's or PhD in FPGA/RTL Design or a related field, along with a minimum of 5 years of experience in FPGA design, particularly in wireless communication domains like 3G, 4G, WiFi, and WiMax. Strong verification skills for high-speed design implementation, a solid understanding of networking protocols, and wireless communication concepts are essential. Your analytical, problem-solving, and teamwork skills will also be critical to your success in this role. This opportunity offers you the chance to work on cutting-edge LiFi technology with global deployment potential. You will be part of an innovative and fast-growing R&D environment that provides opportunities for rapid career advancement based on your performance.,

You should have 10+ years of hands-on experience in FPGA design and development using Verilog/VHDL. Your background should include a strong understanding of synthesis, place & route, timing analysis, and bitstream generation. Proficiency with FPGA tools like Vivado, Quartus, Synplify, etc. is necessary. It is essential to have solid hands-on experience with Wi-Fi MAC/PHY integration or validation. You should be capable of supporting firmware teams and providing system-level debug support. Experience with lab tools such as oscilloscope, logic analyzer, JTAG, etc. will be beneficial. You must possess excellent debugging, analytical, and communication skills. The expected Notice Period for this position is Immediate to 30 days. If you are interested in this opportunity, please share your resume to the email address sushma.vunnam@modernchipsolutions.com.,

As an FPGA Design Engineer, you will be responsible for designing, developing, and testing FPGA-based prototypes for advanced telecommunications systems. Your expertise will play a crucial role in accelerating our product development cycles and ensuring the reliability and performance of our solutions. Key Responsibilities: Design and develop FPGA-based prototypes for telecommunications systems. Collaborate with cross-functional teams to define system requirements and specifications. Implement and optimize FPGA designs using VHDL/Verilog or other hardware description languages. Perform simulation, verification, and debugging of FPGA designs. Conduct performance analysis and optimize FPGA implementations for speed, power, and area. Integrate FPGA prototypes with other system components and perform system-level testing. Document design processes, test plans, and results. Stay updated with the latest advancements in FPGA technology and telecommunications standards. Qualifications: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. 5+ years of experience in FPGA design and prototyping, preferably in the telecommunications domain. Proficiency in VHDL, Verilog, and other hardware description languages. Experience with FPGA design tools such as Xilinx Vivado, Altera Quartus, or similar. Strong understanding of digital signal processing (DSP) and telecommunications protocols. Knowledge of high-speed serial interfaces (e.g., PCIe, Ethernet). Familiarity with system-level integration and testing. Excellent problem-solving and debugging skills. Strong communication and teamwork abilities. Preferred Skills: Experience with software-defined radio (SDR) or related technologies. Knowledge of wireless communication standards (e.g., 4G, 5G). Familiarity with embedded systems and microcontroller programming. Experience with scripting languages such as Python or TCL for automation. Join Us for: Opportunity to work on cutting-edge telecommunications technologies. Collaborative and innovative work environment. Competitive salary and benefits package. Professional growth and development opportunities.,

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; - Grade Specific Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

Job Description The Manager VLSI and Embedded Systems will lead a high-performance design team responsible for developing analog, digital, and mixed-signal systems for airborne applications. The role demands a strong background in FPGA-based designs, VHDL, embedded programming (C), and full lifecycle electronic system development. You will drive innovation, ensure compliance with aerospace standards, and manage cross-functional project execution. --- Key Responsibilities 1. Leadership & Team Management Lead the VLSI and Embedded Systems team and provide strategic and technical direction. Supervise day-to-day project execution and ensure timely delivery with quality benchmarks. Foster innovation, learning, and collaboration across the design team. 2. Technical Design & Development Architect and design analog, digital, and mixed-signal electronics for embedded systems. Work extensively on VHDL and embedded C for system development, simulation, and testing. Guide PCB and Mechanical CAD teams in component layout and housing/enclosure design. Provide domain expertise in power electronics and engine control (preferred). 3. Project Execution & Cross-Functional Coordination Collaborate with Purchase, Production, QA, and Software teams for seamless integration. Drive project planning, budgeting, and milestone tracking. Manage design reviews and prepare updates for senior leadership. 4. Aerospace Standards & Documentation Lead the preparation of technical documentation as per CEMILAC and aerospace guidelines: ATP, QTP, V&V reports, Design Reviews, Reliability Analysis, FMEA, FMECA. Apply knowledge of DO-254, DO-178, MIL-STD-461/704/810, JSS55555 for qualification. Ensure adherence to airworthiness and safety protocols. 5. Continuous Improvement & Innovation Keep abreast with trends in VLSI, embedded systems, and verification tools. Implement design process improvements for enhanced performance and cost-efficiency. Mentor junior engineers and contribute to team capability development. --- Key Skills & Competencies Analog, digital, and mixed-signal circuit design FPGA design, VHDL, and embedded C programming Compliance with airborne standards: DO-254, DO-178, MIL-STDs Design documentation and validation as per CEMILAC guidelines Project leadership, strong analytical, documentation, and cross-functional collaboration skills --- Qualifications & Experience Education: B.E./B.Tech or M.E./M.Tech in Electronics/Electrical Engineering or related discipline. Experience: 812 years in embedded systems, VLSI design, and aerospace-grade product development. Preferred: Experience in power electronics, FPGA architecture, and subsystem integration. Preferred candidate profile

Job Summary: Seeking an experienced FPGA developer to join our team and work on the design and development of complex FPGA-based systems. The ideal candidate will have a strong background in FPGA design, verification, and implementation, as well as experience working with hardware and software engineers to integrate FPGA designs into larger systems.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation. Development of signoff quality constraints and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. TCL script development in addition to running/analyzing/debugging designs. Hands on with Synopsys DCG/Genus/Fusion Compiler. Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains. Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development Experience with either RTL development or Physical Design is also a plus 6+ years experience Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

You are a senior FPGA expert with over a decade of experience in architecting, implementing, and optimizing complex digital systems. Your role will involve owning the design and delivery of mission-critical FPGA-based solutions. You will be responsible for the architecture, design, and implementation of complex FPGAs (Xilinx/Intel), as well as defining and driving system-level hardware architecture in collaboration with cross-functional teams. Additionally, you will lead timing closure, constraint management, and interface integration (PCIe, DDR, high-speed serial), while optimizing performance, power, and resource utilization. Your role will also include providing technical leadership, conducting peer reviews, and mentoring junior engineers. To be successful in this role, you should have 10+ years of hands-on FPGA design experience, deep expertise in Verilog/VHDL/SystemVerilog, and a strong track record of successful tape-outs/productization. Proficiency with tools such as Vivado, Quartus, Synplify, ModelSim, or similar is required. Familiarity with embedded systems, SoCs, or HW/SW integration is considered a plus. The ideal candidate is a self-starter who excels at solving challenging problems, shaping architecture, and delivering production-quality hardware. In this role, you will have the opportunity to work on innovative, performance-critical systems, while enjoying autonomy, ownership, and a voice in architecture decisions. If you are interested or know someone who fits this description, please apply by sending your details to himabindu.jeevarathnam@acldigital.com.,

Company : Mirafra Software Technologies Pvt Ltd Locations : Hyderabad Experience: 6 to 15 yrs Send your resume to: swarnamanjari@mirafra.com or APPLY Or tag/share with someone actively looking! Lets connect the right talent to the right opportunity! 1) Job Description (5 to 10 yrs) Strong in digital design. • Strong in Xilinx Vivado IP & IPI tools till bit-generation. • Knowledge of VHDL/Verilog/System Verilog. • Knowledge of Validating IP/IP Example designs on Xilinx boards, debugging of failures on target boards, board bring up. • Proficiency in Linux environment. • Good communication skills. Basic Job Deliverable : RTL coding, IP design, Modify/update existing IP as per requirements. 2) Job Description (7 to 12yrs) 7 to 12 years of experience in digital design. • RTL coding experience using Verilog and/or System Verilog. • Working experience of AMD/Xilinx FPGA and Vivado. • Experience in Video domain (DisplayPort/MIPI) is preferred. • Candidate shall be working at AMD Sattva site, Hyderabad. 3) Job Description (2 to 4yrs) Design Creation and Analysis profile with RTL, STA, Scripting and FPGA flow (Vivado/ Quartus/ Lattice). Education & Other Requirements B.Tech / M.Tech / BE in Electronics, Electrical, ECE or equivalent

As an FPGA Firmware Engineer, you will be responsible for developing detailed specifications based on requirements and implementing FPGA designs in accordance with those defined requirements and/or specifications. You will collaborate with other members of the design team to evaluate possible alternatives during the development process and determine the best approach based on performance, cost, and resources. Additionally, you will perform simulation activities including timing analysis, behavioral, and functional simulations. Your role will also involve documenting ideas, designs, specifications, and instructions to comply with client standards. As a senior member of the team, you will mentor junior members of the business unit to promote design team abilities and establish good working practices. The ideal candidate should possess a degree in Computer Science, Engineering, or a related field such as Electronics, Electrical, Computer Engineering, or Computer Science Engineering. You should have 5-10 years of experience in FPGA design, FPGA firmware, or related work. Excellent interpersonal and analytical skills are essential, with the ability to work independently and create customer-facing applications. Preferred expertise for this role includes 5+ years of direct hands-on experience with IP integration and/or HLS based implementation for resources and timing optimization. Good interpersonal skills are a must, as you will be required to work between multiple departments in carrying out the duties of this position.,