Field-Programmable Gate Arrays Engineer

Role Overview: As an FPGA Developer, you will be responsible for designing, implementing, and testing Field-Programmable Gate Array (FPGA) solutions. You will work with Vivado and various coding languages to develop AXI peripherals for Zynq and other Xilinx FPGAs. Your expertise in implementing timing constraints, interfacing external memory, and writing test benches will be crucial for the success of projects. Additionally, your knowledge of Matlab, C, and Python will be utilized for various tasks including configuring Microblaze and writing PC side code for interfacing over RS232. Familiarity with reading schematics and implementing State Machines will also be required. Key Responsibilities: - Comfortable with Vivado - Proficient in VHDL/Verilog/SystemVerilog - Developed AXI peripherals for Zynq and other Xilinx FPGAs, with knowledge of PS and PL parts - Implement timing and other constraints - Interface external memory using the EMC in Vivado - Write test benches and run simulations - Working knowledge of Matlab, C & Python - Configure Microblaze and run bare metal C code - Write PC side code for interfacing over RS232 - Read schematics - Implemented State Machines Qualifications Required: - Experience with Vivado and coding languages VHDL/Verilog/SystemVerilog - Proficiency in developing AXI peripherals for Zynq and other Xilinx FPGAs - Knowledge of implementing timing and other constraints - Ability to interface external memory using the EMC in Vivado - Experience in writing test benches and running simulations - Working knowledge of Matlab, C & Python - Familiarity with configuring Microblaze and running bare metal C code - Ability to write PC side code for interfacing over RS232 - Capability to read schematics and implement State Machines,