20 Verification Methodologies Jobs

DESCRIPTION As a Design Verification Manager, you will contribute to exploring innovative hardware designs to enhance our devices. You will define verification methodology and implement test plans for advanced functional blocks while collaborating with cross-functional teams to develop world-class hardware devices. You will participate in the bringup of such blocks on Simulation and Emulation platforms. You will work closely with multi-disciplinary groups including Architecture, RTL Design, PD, Validation, Software and Product Design to architect and implement verification environments for complex functional block that enable development of world-class hardware devices. In this role, you will: . Architect and implement verification environments for complex functional blocks . Create and enhance verification environments using SystemVerilog and UVM . Develop comprehensive test plans through collaboration with design engineers, SW and architects . Implement coverage measures for stimulus and corner-case scenarios . Participate in test plan and coverage reviews . Drive complex RTL and TB debugs . Drive UPF based low power verification . Contribute to verification activities across simulation and emulation platforms . Work on creating the automation scripts to support DV methodologies . Create infrastructure to performs system level performance analysis . Manage a team of 6-8 DV Engineers BASIC QUALIFICATIONS . Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent . 10+ years or more of practical semiconductor ASIC experience including owning end to end DV of major SOC blocks . Managing a team of DV Engineers . Experience with RTL development environments . Proficiency in hardware description languages and verification methodologies . Experience verifying complex IP blocks integrated into SOCs . Knowledge of verification platforms including UVM, emulation, and FPGA . Demonstrated success in test plan development and verification infrastructure . Experience with industry-standard tools and scripting languages (Python or Perl) . Understanding of object-oriented programming concepts PREFERRED QUALIFICATIONS . Advanced degrees in Computer Science, Electrical Engineering, or related field . Experience with ARM and DSP instruction set architectures . Expertise in system-level debugging . Strong programming skills in SV, UVM and C . Knowledge of AMBA bus protocols . Experience with formal verification methods . Experience with Low power verification methods . Experience with Baremetal processor environments . Transaction level modelling expertise . Familiarity with industry standard I/O interfaces . FPGA and emulation platform knowledge . Understanding of SoC architecture . Strong verbal and written communication abilities Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.

DESCRIPTION As a Senior Design Verification Engineer, you will contribute to exploring innovative hardware designs to enhance our devices. You will define verification methodology and implement test plans for advanced functional blocks while collaborating with cross-functional teams to develop world-class hardware devices. You will participate in the bringup of such blocks on Simulation and Emulation platforms. You will work closely with multi-disciplinary groups including Architecture, RTL Design, PD, Validation, Software and Product Design to architect and implement verification environments for complex functional block that enable development of world-class hardware devices. In this role, you will: . Architect and implement verification environments for complex functional blocks . Create and enhance verification environments using SystemVerilog and UVM . Develop comprehensive test plans through collaboration with design engineers, SW and architects . Implement coverage measures for stimulus and corner-case scenarios . Participate in test plan and coverage reviews . Drive complex RTL and TB debugs . Drive UPF based low power verification . Contribute to verification activities across simulation and emulation platforms . Work on creating the automation scripts to support DV methodologies . Create infrastructure to performs system level performance analysis BASIC QUALIFICATIONS . Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent . 10+ years or more of practical semiconductor ASIC experience including owning end to end DV of major SOC blocks . Experience with RTL development environments . Proficiency in hardware description languages and verification methodologies . Experience verifying complex IP blocks integrated into SOCs . Knowledge of verification platforms including UVM, emulation, and FPGA . Demonstrated success in test plan development and verification infrastructure . Experience with industry-standard tools and scripting languages (Python or Perl) . Understanding of object-oriented programming concepts PREFERRED QUALIFICATIONS . Advanced degrees in Computer Science, Electrical Engineering, or related field . Experience with ARM and DSP instruction set architectures . Expertise in system-level debugging . Strong programming skills in SV, UVM and C . Knowledge of AMBA bus protocols . Experience with formal verification methods . Experience with Low power verification methods . Experience with Baremetal processor environments . Transaction level modelling expertise . Familiarity with industry standard I/O interfaces . FPGA and emulation platform knowledge . Understanding of SoC architecture . Strong verbal and written communication abilities Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.

About Us: Silcosys Solutions Private Limited is a pioneer in semiconductor innovation, committed to delivering cutting-edge analog design solutions that power the future of technology. If you are eager to work on impactful projects and advance your expertise, we invite you to join our dynamic team. Job Description: As an RTL Design Engineer, you will be responsible for designing and implementing high-quality RTL code for complex digital blocks and subsystems. You will collaborate with architects, verification, and physical design teams to create designs that meet functional, performance, and power requirements. Responsibilities: 1. Develop RTL designs for digital IPs, subsystems, and SoCs based on architectural specifications. 2. Collaborate with architects and system engineers to translate high-level requirements into detailed micro-architecture. 3. Perform design optimizations for area, power, and performance. 4. Conduct design reviews and ensure compliance with coding standards and best practices. 5. Work closely with verification teams to develop test plans and ensure 100% functional coverage. 6. Debug and resolve design and integration issues during simulation and post-silicon validation. 7. Participate in timing analysis and closure in collaboration with the physical design team. 8. Document design specifications, test cases, and user guides for IP and SoC designs. Requirements: 1. Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field. 2. 2-10 years of experience in RTL design and implementation for VLSI systems. 3. Strong expertise in Verilog, SystemVerilog, and RTL design methodologies. 4. Solid understanding of digital design concepts such as pipelining, clock domain crossing, and low-power design techniques. 5. Experience with EDA tools like Synopsys Design Compiler, Cadence Genus, or equivalent. Proficiency in scripting languages (Python, Perl, TCL) for design automation. 6. Familiarity with SoC interfaces and protocols like AXI, AHB, PCIe, USB, or DDR. 7. Experience in static timing analysis (STA) and timing closure workflows. 8. Strong problem-solving skills and the ability to debug complex design issues. 9. Excellent communication and collaboration skills to work effectively in a team environment. Preferred Qualifications: 1. Experience with low-power design and multi-clock domain systems. 2. Knowledge of advanced process nodes (e.g., 7nm, 5nm, or below) and FinFET technologies. 3. Exposure to formal verification methodologies. Experience in hardware-software co-design and FPGA prototyping. 4. Familiarity with machine learning or AI-based RTL optimizations. Why Join Us? 1. Work on groundbreaking projects in VLSI design and technology. 2. Collaborate with a team of industry experts in a supportive and innovative environment. 3. Opportunities for career growth and continuous learning. 4. Competitive salary and benefits. How to Apply: If this role excites you, submit your updated resume at info@silcosys.com and any relevant project portfolios today. Join Silcosys Solutions Private Limited and shape the future of analog design!

About the Role: We are seeking a highly experienced Verification Engineer to join our dynamic team, driving innovation in advanced verification methodologies for complex semiconductor designs. You will play a key role in architecting, developing, and deploying verification methodologies for industry-leading IPs and sub-systems. Key Responsibilities: Lead the deployment of verification tools, platforms, and strategies for complex IPs Drive simulation-based and hardware-assisted verification efforts, including debugging and root cause analysis Apply expertise in a broad range of verification technologies, including simulation, static, and formal verification Develop and enhance verification methodologies, including verification cockpits and CAD flows Collaborate cross-functionally with IP design and DV teams as well as tools teams to ensure product quality Mentor and guide junior engineers, fostering a culture of technical excellence Qualifications: 10+ years of experience in verification engineering for complex hardware systems Deep expertise in simulation and debug, with a proven track record of silicon success Hands-on experience with Static/ Formal verification tools and methodologies Experience developing and deploying verification methodologies, including verification cockpits and CAD flows Exposure to hardware-assisted verification environments (FPGA prototyping, emulation) is a strong plus Strong analytical, problem-solving, and communication skills Bachelors or Masters in Electrical Engineering, Computer Engineering, or related field Familiarity with industry-standard verification languages (SystemVerilog, UVM, SVA) Experience with scripting and automation (Python, Perl, TCL) Track record of technical leadership and cross-functional collaboration Why Synopsys: Join a team that powers innovation and values agility, courage, excellence, and trust. We offer opportunities to work on cutting-edge technology and make a real impact. Show more Show less

Work Location : Spain, UK Work Expertise : 8 - 12 years Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering. Expertisein ASIC verification. Expertise in RISC-V verification Expertise in frontend RTL design and SoC integration Expertise in CPU integration Expertise in verification methodologies Expertise in RISC-V CPU and SoC verificationprojects VISA SPONSORED FOR IMMEDIATE HIRES Show more Show less

Principal Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: A highly-skilled ASIC Digital Verification Engineer with a passion for developing functional verification solutions for RTL based IP Cores. You are experienced in handling complex protocols and thrive in a collaborative international environment. With over 15 years of experience, you possess a deep understanding of verification methodologies and are proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM). You are adept at making architectural decisions, implementing test benches, and driving innovation in verification solutions. You are a proactive team player with excellent communication and problem-solving skills, ready to contribute to cutting-edge projects in AI/machine learning, automotive, and server farm applications. What Youll Be Doing: Making architecture decisions on test bench design. Writing verification plans and specifications. Implementing test bench infrastructure and writing test cases. Utilizing a coverage-driven methodology. Providing technical leadership and guidance to the team. Collaborating with architects, designers, and other verification team members across multiple sites worldwide. The Impact You Will Have: Ensuring the reliability and performance of IP Cores used in critical applications. Driving innovation in verification methodologies and solutions. Contributing to the development of industry-leading technologies in AI, automotive, and server farms. Enhancing productivity and throughput through effective verification strategies. Maintaining high standards of quality and functionality in IP verification. Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement. What Youll Need: Extensive knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, MIPI. Hands-on experience in creating test environments from functional specifications using UVM/VMM/OVM. Proficiency in SystemVerilog (SV), UVM, and object-oriented coding and verification. Ability to provide innovative verification solutions for enhanced productivity and performance. Experience with scripting languages like C/C++, TCL, Perl, Python is an added advantage. Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage Who You Are: You are an independent thinker with a precise approach to work, capable of driving innovation and leading technical projects. Your communication skills are excellent, and you thrive in a team-oriented environment. You are committed to continuous learning and possess a strong problem-solving aptitude. Experience with functional safety standards like ISO26262 and FMEDA is a plus. The Team Youll Be A Part Of: You will be part of the Solutions Group at our Bangalore Design Center, India. This team is dedicated to developing functional verification solutions for IP used in diverse applications, including server farms, AI/machine learning, and automotive sectors. You will work closely with architects, designers, and other verification team members across multiple international sites, contributing to innovative and challenging projects. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process....Less Show more Show less

As a Design Verification Engineer with over 5 years of experience, particularly in HBM & DDR DRAM IP and Subsystem verification, you will be an integral part of our innovative team. Your role will involve developing and executing verification plans, creating testbenches, and collaborating with design engineers to ensure high-quality and robust designs. Your responsibilities will include developing comprehensive verification plans for HBM4/4e IP and Subsystem, creating and maintaining testbenches using System Verilog and UVM methodology, performing functional verification of RTL designs, and resolving design and verification issues. You will also generate verification metrics, participate in design reviews, and stay updated with the latest verification technologies. To excel in this role, you should hold a Bachelor's or Master's degree in Electrical/Electronics Engineering or a related field, have 5+ years of experience in design verification, and possess knowledge of verification languages and methodologies. Proficiency in System Verilog, UVM, and scripting languages for automation is essential. Strong problem-solving skills, attention to detail, and effective communication and teamwork abilities are crucial for success in this position. Additionally, you will be expected to mentor junior verification engineers, provide technical guidance, and contribute to the continuous improvement of verification efficiency and effectiveness. Your proven track record of successfully verifying complex IP blocks and subsystems will be highly valued in this role.,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An experienced and visionary ASIC Verification Engineer, Architect who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in verification methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of serial protocols such as PCIe/CXL, UCIe etc. You can define and execute Testbench architecture for protocols such as PCIe/CXL. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects. What Youll Be Doing: Defining and developing ASIC RTL verification at both chip and block levels. Creating and executing verification plans for complex digital designs, particularly focusing on PCIe/CXL protocols. Collaborating with cross-functional teams to ensure seamless integration and functionality of designs. Utilizing advanced verification methodologies and tools to achieve high-quality results. Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement. Communicating with internal and external stakeholders to align on project goals and deliverables. The Impact You Will Have: Enhancing the reliability and performance of Synopsys digital verification processes. Improving time-to-market for robust Synopsys Interface IP controller through efficient verification methodologies. Mentoring and nurturing a highly skilled verification team, elevating overall project quality. Influencing strategic decisions that shape the future of Synopsys capabilities. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements. What Youll Need: Extensive experience in ASIC RTL verification. In-depth knowledge of PCIe, CXL , UCIe and similar IO protocols. Proficiency in advanced digital design verification tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. Experience of 15+ years in relevant domain. Who You Are: A mentor who fosters talent and encourages innovation. A proactive problem solver who thrives in complex environments. An effective communicator with the ability to convey technical concepts to a broad audience. A team player who values collaboration and diversity. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Show more Show less

As an SMTS Silicon Design Engineer at AMD, you will play a crucial role in advancing next-generation computing experiences through the development of cutting-edge products. Your responsibilities will include creating feature-based performance test plans, writing tests, conducting performance verification, achieving architectural model closure, and closing RTL designs. Additionally, you will need to demonstrate expertise in shader development, driver workload analysis, benchmarking, microarchitecture development, and GEMM kernel debugging. Your strong skills in SV/C-C++ based BFM development and memory modeling will be essential for success in this role. To excel in this position, you must have a Bachelor's degree with at least 12 years of experience or a Master's degree with at least 10 years of experience. A deep understanding of Graphics Architecture, excellent IP-level debug skills for compute and 3D, and proficiency in advanced verification methodologies and languages such as C/C++, UVM, and SystemVerilog are required. Experience with scripting languages like Python and Perl, as well as tools like Emupower, Prime Time, and Power Artist, is also necessary. Familiarity with formal property-based verification, latency pipeline analysis, and performance bottleneck identification will be advantageous. Furthermore, you should possess a solid understanding of memory hierarchies, caches, address translation schemes, and general DRAM technologies. Knowledge of computer organization/architecture, strong analytical and problem-solving skills, and attention to detail are essential for success in this role. As a self-starter, you must be able to drive tasks independently to completion while also collaborating effectively with cross-functional teams. Strong leadership, innovation, and communication skills are key attributes that will contribute to your success in this role. In addition to your technical qualifications, you are required to hold a B.E/B.Tech or M.E/M.Tech degree in ECE/Electrical Engineering with a focus on Digital Systems/VLSI. A flair for market development and innovation in the graphics industry will be beneficial for this role. Join us at AMD and be a part of a culture that values innovation, excellence, and collaboration. Together, we can advance the boundaries of technology and make a meaningful impact on the world.,

XIMAX SOLUTIONS in Bengaluru is passionate about talent acquisition, HR consultancy, and career development. We specialize in connecting the right talent with the right opportunities, fostering meaningful relationships, and guiding professionals towards fulfilling careers to drive success and unlock potential. We have the following job opportunities available: **Job 1: Verification Engineer (ARM CPU Based Sub-System, C Programming)** - **Location:** Bangalore - **Experience Required:** 7+ years - **Employment Type:** Full-time **Key Skills & Requirements:** - Expertise in verifying ARM CPU-based sub-systems - Proficiency in C programming - Strong knowledge of verification methodologies - Experience with System Verilog and UVM - Ability to create and execute test plans - Excellent debugging and analytical skills **Job 2: Verification Engineer (SV & UVM)** - **Location:** Bangalore - **Experience Required:** 5+ years - **Employment Type:** Full-time **Key Skills & Requirements:** - Proficient in System Verilog and UVM. - Strong knowledge of verification methodologies. - Experience with simulation and debugging tools. - Ability to create and execute test plans. - Excellent problem-solving and analytical skills. - Strong communication and teamwork skills. If you meet the requirements for either of these positions and are interested in joining our team, please send your resume to ramya@ximaxsolutions.com by 7th October 2024. Join us at XIMAX SOLUTIONS and be a part of the future of semiconductor innovation! Apply here: [Job Application Form](https://forms.gle/b15i5gFeFb9jnN7D9),

As a Senior Silicon Verification Engineer at AMD, you will play a crucial role in contributing to the advancement of our cutting-edge technologies. You will be part of a dynamic team focused on delivering high-quality solutions to the market, ensuring AMD remains at the forefront of innovation in the industry. Your dedication and expertise will be instrumental in driving the success of our verification engineering efforts and fostering continuous career growth. Your passion for modern processor architecture, digital design, and verification will be key assets in this role. You will collaborate with a diverse team of engineers across different locations and time zones, leveraging your strong analytical and problem-solving skills to tackle complex challenges. Your ability to communicate effectively and work seamlessly with others will be essential in achieving our collective goals. Key responsibilities in this role include developing and maintaining tests for functional verification at the SOC level, building testbench components to support next-generation IP, and enhancing verification libraries for SOC/full-chip level verification. You will also provide technical support to other teams and assist the hardware emulation team in porting RTL to various platforms. Preferred experience for this position includes familiarity with verification methodologies such as OVM, UVM, or VMM, as well as knowledge of Verilog, logic design concepts, and system-level architecture. Proficiency in UNIX environment and scripting languages like Perl or Python, along with strong waveform debug skills using industry-standard design tools, is highly desirable. Experience with UNIX Revision Control tools, bug tracking tools, and verifying multimillion gate chip designs will be advantageous. To be successful in this role, you should hold a BS/MS in EE, CE, or CS, along with 4+ years of design verification experience and 3+ years of OOP coding experience. Demonstrating excellent communication, presentation skills, and the ability to collaborate effectively with cross-functional teams are essential qualities for this position. Familiarity with processors, boot flow, and software development flow would be beneficial in fulfilling the responsibilities of this role effectively. Join us at AMD and be part of a team that is dedicated to pushing the limits of innovation and transforming lives with groundbreaking technologies. Your contributions will be valued, and your career development will be supported as we work together to advance the future of computing experiences.,

As a Software Developer with 5 to 8 years of experience, you will be responsible for developing and debugging embedded applications using the C/C++ programming language. You should have a good understanding of Embedded Linux (Timesys, Buildroot, Yocto) and RTOS, along with experience in video encoding and decoding. Hands-on experience in developing device drivers is a must, as well as working knowledge of Embedded devices and communication protocols such as Microcontrollers, JTAG/UART/I2C/ICSP. Your role will involve updating complex software components and subsystems in a released product and debugging the code in collaboration with HW engineers. You will be responsible for testing the code developed, which includes unit tests, integration tests, issue resolution, verification, and validation. Identifying root causes of issues, determining potential solutions, and evaluating them against requirements will be crucial aspects of your responsibilities. It is essential to have knowledge of Cross-platform build environments like CMake, ARM, and familiarity with filesystems, block devices, bootloaders (UBIFS, NAND flash, eMMC, u-boot). Good exposure to verification methodologies, software testing methodologies, and documentation skills will be beneficial in this role. You will also participate in software planning and estimating activities, delivering work within defined timelines while achieving product quality goals. Mentoring and training team members, documenting work according to organization quality standards, and following the company's standards for code development and quality processes are integral parts of your responsibilities. Basic electronics debugging and troubleshooting skills, along with a good understanding of algorithms, design patterns, and data structures are necessary for this position. Experience with Software Version Control tools like Git/Bitbucket, Documentation tools like Microsoft Word and Excel, and Project Tracking tools like JIRA will be advantageous. Your role will involve ensuring the integrity and security of patient health information, company intellectual property, and confidential data. Strong analytical and problem-solving skills, along with a demonstrated ability to work in a team environment, are essential for success in this role. Location: Gurgaon,

If you're interested in computer graphics and working with leading graphics validation engineers on Intel's latest GPU architecture, then our GPU Hardware IP (GHI) has an opportunity for you. In this position, you will be playing a key role in the pre-silicon validation of Intel's leading-edge graphics IP. As a candidate, you will build emulation/fpga prototyping platforms, develop efficient verification methodologies, execute to the validation plan, and debug issues seen during validation. You will define, develop, and perform functional validation for GPUs, focusing on the interaction of GPUs, media, display, and system-level features. Using various hardware and software tools and techniques, you will ensure validation coverage and that performance, power, and area goals are met. Additionally, you will review proposed design changes to assess their impact on validation plans, tasks, and timelines. Collaborating with other engineers, you will develop GPU validation methodologies, execute validation plans, optimize designs, troubleshoot, and perform failure analysis. Silicon debug will be a part of your responsibilities to identify root causes and resolve functional and triage failures for GPU issues. Your tasks will involve testing interactions between various GPU features using validation infrastructure, developing pre-silicon validation infrastructure, and creating a test environment for validation testing. Furthermore, you will publish GPU validation reports summarizing all validation activities performed, review results, and communicate them to relevant teams. Additionally, you will work with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for graphics interfaces to meet desired product specifications. The ideal candidate will exhibit analytical skills and possess a Bachelor's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related STEM degree with 3+ years of industry experience, or a Master's Degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related STEM degree with 1+ years of industry experience. Knowledge of Computer Architecture, Microarchitecture Fundamentals, functional testing, pre-silicon validation techniques, tools, simulation, debug/troubleshooting, Zebu emulation, fpga prototyping, acceleration platforms, software programming in C/C++, and automation/scripting are required qualifications. Preferred qualifications include a deep understanding of HW/FW flows, experience and hands-on skills with LTB, ITP, Logic Analyzers, Oscilloscopes, Scan dumps, and in-circuit Emulators. This is an Experienced Hire job type with Shift 1 (India) as the primary location in India, Bangalore, under the Client Computing Group (CCG) responsible for driving business strategy and product development for Intel's PC products and platforms.,

Responsibilities Be the primary point of contact for IP and SoC functional verification for cross-functional teams. Participate with architecture, design teams, silicon validation, and software teams in defining the overall verification strategy of our SoCs. Develop high-performance and low power hardware to enable Google's continuous innovations in consumer hardware. Minimum qualifications: Bachelor's degree in Computer Science or Electrical Engineering or equivalent practical experience. 5 years of experience in driving/leading functional verification for Intellectual Properties (IPs) and System-on-a-Chip (SoCs). Experience working with System Verilog and Universal Verification Methodology (UVM). Preferred qualifications: Master's degree in Computer Science or Electrical Engineering or equivalent practical experience. Experience leading design verification of an SoC or large ASICs. Experience in different verification techniques and methodologies, including formal, Gate Level Simulation, Unified Power Format based Power simulations, UVM, etc. to achieve bug-free Silicon in complex SoC. Experience in scripting languages (e.g., Python, Perl) for automation and analysis. Experience in driving cross-functional teams for high quality tape-outs.

Role Responsibilities: Plan and develop formal verification strategies for complex digital design blocks. Create properties and constraints using formal verification tools for property verification. Resolve verification challenges and improve methodologies for better results. Architect and implement reusable components to enhance formal verification processes. Job Requirements: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience. 3 years of experience with verification methodologies and languages such as UVM and System Verilog. Experience with designing and maintaining verification test benches and environments.

Role Responsibilities: Research, design, and implement ML/AI techniques for verification tasks like test case generation, coverage analysis, and performance optimization. Analyze large datasets of simulation results to identify patterns and trends for verification applications. Build and train ML models for anomaly detection, pattern recognition, and prediction. Develop and maintain verification tools, test plans, and scripts to automate tasks and improve model performance. Job Requirements: Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field. 5 years of experience with ML/AI frameworks (e.g., TensorFlow, PyTorch, scikit-learn). Experience with hardware description languages (e.g., Verilog, SystemVerilog, VHDL). Experience applying ML/AI techniques to hardware design and verification.

As a highly experienced Verification Engineer at our dynamic team, you will drive innovation in advanced verification methodologies for complex semiconductor designs. Your key responsibilities will include leading the deployment of verification tools, platforms, and strategies for complex IPs, driving simulation-based and hardware-assisted verification efforts, applying expertise in various verification technologies, developing and enhancing verification methodologies, collaborating cross-functionally with IP design and DV teams, and mentoring junior engineers to foster a culture of technical excellence. You should have 10+ years of experience in verification engineering for complex hardware systems, deep expertise in simulation and debug, hands-on experience with Static/Formal verification tools and methodologies, exposure to hardware-assisted verification environments, strong analytical and problem-solving skills, a degree in Electrical Engineering, Computer Engineering, or related field, familiarity with industry-standard verification languages, experience with scripting and automation, and a track record of technical leadership and cross-functional collaboration. Join our team at Synopsys and be part of an environment that values agility, courage, excellence, and trust. You will have the opportunity to work on cutting-edge technology and make a real impact.,

Key Responsibilities: We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 12 + years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus.

e are seeking a skilled Verification Engineer to join our team. The successful candidate will be responsible for the verification of internally developed VTLs (Veloce-friendly standard protocols such as AMBA, PCIe, SAS, Ethernet, MIPI, etc.) using various standard verification methodologies, including UVM, and ensuring signoff based on coverage matrix. Responsibilities Develop verification environments using the standard verification methodologies for protocols like PCIe, SAS, SATA, etc. Implement IP-level verification to ensure 100% functional and code coverage. Suggest and prototype various verification flows using Veloce. Integrate and qualify various VTLs with Questa-based Verification IPs. Apply customer use models within internal test suites, which may require interfacing with customers and occasional travel to customer sites. Automate and enhance methodology suites to improve verification efficiency and productivity. . Qualifications: We seek a Graduate / Post Graduate (Bachelors/Masters) in EEE) / ECE/VLSI from top reputed Engineering colleges with 4-8 years of significant experience in software development. Experience in EDA will be a phenomenal plus! We value you practical experience with any of the following protocols: AMBA, PCI/PCIe, SAS, Ethernet, MIPI. Experience in IP and SOC level verification. Proficiency of verification methodologies such as Specman, SV, UVM, OVM, TLM, Assertion, Coverage, co-simulation, and co-verification. FPGA/Emulation experience is helpful. Strong scripting and automation knowledge is a significant plus! Good interpersonal skills for working with external interfaces. Good problem solving and analytical skills. The person should be self-motivated and can work independently.

5+ exp in verification at IP/sub-system level. Well versed in (Digital design, SV, UVM). Experience in DDR, PHY protocols. Responsibilities: Develop and execute comprehensive verification plans and testbenches. Write high-quality, efficient, and reusable verification components. Create and maintain detailed verification documentation. Debug complex verification issues and propose solutions. Collaborate with design engineers to ensure design quality and performance. Stay up-to-date with the latest verification methodologies and tools.