Formal Verification Engineer

Role Overview: As a Formal Verification Engineer, your primary responsibility will be to ensure design correctness using mathematical methods like model checking and equivalence checking, without relying on simulation. You will play a crucial role in detecting corner-case bugs early in the design cycle to enhance quality and reduce verification time. Your expertise in SoC Verification will be instrumental in accomplishing these goals. Key Responsibilities: - Define comprehensive test plans and test case designs for RPG product validation. - Develop and maintain automated test scripts to ensure thorough product testing. - Collaborate effectively with architecture and design teams to establish and refine validation flows. - Conduct and debug gate-level simulations to validate product functionality and performance. - Perform PHY verification and validate high-speed blocks, including input/output operations. - Utilize and apply APB/AXI protocols and modern verification methodologies in validation processes. - Document test results, identify defects, and provide actionable feedback to development teams. Qualifications Required: - Minimum 5 years of experience in PHY verification and high-speed block testing. - Strong understanding of IO operations and gate-level simulation debugging. - Proficiency in APB/AXI protocols and verification methodologies. - Ability to design, develop, and execute detailed test plans and scripts. - Excellent problem-solving skills and attention to detail. - Effective communication and teamwork abilities. - Familiarity with scripting languages and test automation tools is highly desirable. (Note: The additional details of the company were not present in the provided job description.),