35 Tcl Scripting Jobs - Page 2

Relevant experience required (in years): 3+ years of IT experience. Your position Within Vanderlande, the primary tool for managing our product data is Enovia 3DEXPERIENCE. The PLM tool is highly integrated into the Vanderlande IT landscape, using our ESB. It acts as the product data backbone. In this position, you will be responsible for the quality of the PLM service for over 2000 active users, spread across around the world. We are seeking a motivated Enovia PLM resource with 3+ years of experience to join our team in Vanderlande, Pune. Your team The PLM team consists of 9 people spread between Veghel and Pune, India. The members are multi-disciplinary, including both technical and functional specialists. The PLM team is part of the ICT Platform and Technology Solutions department. This department focusses on delivery of services which are used for the development and lifecycle management of multi-disciplinary Vanderlande products. Required Skills & Competencies: Good knowledge of Enovia PLM (2016x onwards) Proficient in Core Java and JavaScript, JSP, Customization of UI3 Component, triggers, TCL Scripting, MQL. Knowledge of TVC (Technia Value Component) will be an added advantage. Experience in developing Web Services using SOAP and RESTFUL Services. Knowledge of Exalead search and its configuration. Knowledge of integration with Solidworks. Knowledge of build tools such as Ant, Gradle, or Maven. Experience with version control systems like GIT or Sourcetree. Experience in working with Eclipse/IntelliJ IDE. Understanding of Agile methodology and Scrum practices. Strong communication and interpersonal skills. About the Company: Vanderlande Website: Why should you join Vanderlande India Global Capability Center (GCC) We are certified as Great Place to Work by the prestigious Great Place to Work Institute. Flexible and Hybrid Workplace. Vanderlande Academy and training facilities to boost your skills. Mediclaim benefit including parental coverage. On-site company health centers with a gym, employee wellbeing sessions, in house doctor support. A variety in Vanderlande Network communities and initiatives. Opportunity to collaborate globally.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3 to 5 years of experience in static timing analysis, constraints and other physical implementation aspects. Solid understanding industry standard tools PT, Tempus, And should be familliar to PNR tools like Innovus/FC Solid grip on STA fixing aspects to solve extreme critical timing and clock path analysis Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs and manual ECOs as well. Experience in deep submicron process technology nodes is strongly preferred - Below 10nm Knowledge of high performance and low power interface timing is added benefit. Strong fundamentals on basic VLSI design concepts, synchronous design timing checks, understanding of constraints Good experience with in Unix, TCL, PT-TCL, Tempus-TCL scripting Familiarity with Python background is added bonus

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Requirements Looking for a highly talented and a technically strong leader with an eye for quality to lead a high performing and talented team of engineers in the implementation domain for Display Sub-System. Able to handle multiple project execution that are time critical and complex Able to communicate effectively with all stakeholders across the organization Able to collaborate with cross functional teams for upholding the best practices and enabling smooth execution Focus on improving execution efficiency and improve on the optimizations in area, power and performance. Able to grow the team in terms of technical depth and size as we do more and more projects Able to innovate and bring fresh ideas Bachelors or masters degree in engineering with 9-13+ Years of experience. Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure. Experience in all aspects of timing closure for multi-clock domain designs. Should be familiar with MCMM synthesis and optimization. Should have good understanding of low-power design implementation using UPF. Experience with scripting language such as Perl/ Python, TCL. Experience with different power optimization flows or technique such as clock gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Responsibilities include Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation. Development of signoff quality constraints and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. TCL script development in addition to running/analyzing/debugging designs. Hands on with Synopsys DCG/Genus/Fusion Compiler. Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains. Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development Experience with either RTL development or Physical Design is also a plus 13+ Years experience Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 5+ Year of industry experiences in the following areas Expertise in Synthesis - Synopsys Design Compiler, DCG/DC_NXT/Fusion Compiler and/or Cadence RC/Genus. o"ƒHands on with multi-voltage, power aware synthesis, UPF flows in synthesis and low power designs. o"ƒExpertise in formal verification with Cadence LEC/ Synopsys Formality o"ƒExpertise in writing and debugging timing constraints o"ƒPerl and/or TCL scripting, makefile flows. Qualcomm's compute sub system engineers will work on next generation low power, machine Learning sub-system for our system-on-chip (SoC) products used in Smartphone, Automotive and other low power devices. Become a key member of the core team developing fastest smartphone SoC devices implemented on the latest cutting-edge process technologies. In this role candidate will be responsible for compute sub system implementation that includes Physically aware Synthesis -DCG/Fusion Compiler/Genus. In addition, he/she will perform tasks toward constraints development, clock definitions, timing analysis, UPF, CLP check, Formal Verification and ECO flow. He/She will be working closely with physical Design team to optimize designs for power, area, and performance. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

locationsPune Iposted onPosted 30+ Days Ago job requisition idJR27979 Job Title Junior PLM specialist About The Role Job Title Junior PLM Specialist Work Location Pune Relevant experience required (in years) 3+ years of IT experience. Your position Within Vanderlande, the primary tool for managing our product data is Enovia 3DEXPERIENCE. The PLM tool is highly integrated into the Vanderlande IT landscape, using our ESB. It acts as the product data backbone. In this position, you will be responsible for the quality of the PLM service for over 2000 active users, spread across around the world. We are seeking a motivated Enovia PLM resource with 3+ years of experience to join our team in Vanderlande, Pune. Your team The PLM team consists of 9 people spread between Veghel and Pune, India. The members are multi-disciplinary, including both technical and functional specialists. The PLM team is part of the ICT Platform and Technology Solutions department. This department focusses on delivery of services which are used for the development and lifecycle management of multi-disciplinary Vanderlande products. Required Skills & Competencies Good knowledge of Enovia PLM (2016x onwards) Proficient in Core Java and JavaScript, JSP, Customization of UI3 Component, triggers, TCL Scripting, MQL. Knowledge of TVC (Technia Value Component) will be an added advantage. Experience in developing Web Services using SOAP and RESTFUL Services. Knowledge of Exalead search and its configuration. Knowledge of integration with Solidworks. Knowledge of build tools such as Ant, Gradle, or Maven. Experience with version control systems like GIT or Sourcetree. Experience in working with Eclipse/IntelliJ IDE. Understanding of Agile methodology and Scrum practices. Strong communication and interpersonal skills. About the Company Vanderlande Website Vanderlande is a market-leading, global partner for future-proof logistic process automation in the warehousing, airports and parcel sectors. Its extensive portfolio of integrated solutions innovative systems, intelligent software and life-cycle services results in the realization of fast, reliable and efficient automation technology. Established in 1949, Vanderlande has more than 9,000 employees, all committed to moving its Customers businesses forward at diverse locations on every continent. It has established a global reputation over the past seven decades as a highly reliable partner for future-proof logistic process automation. Vanderlande was acquired in 2017 by Toyota Industries Corporation, which will help it to continue its sustainable profitable growth. The two companies have a strong strategic match, and the synergies include cross-selling, product innovations, and research and development. Why should you join Vanderlande India Global Capability Center (GCC) We are certified as Great Place to Work by the prestigious Great Place to Work Institute. Flexible and Hybrid Workplace. Vanderlande Academy and training facilities to boost your skills. Mediclaim benefit including parental coverage. On-site company health centers with a gym, employee wellbeing sessions, in house doctor support. A variety in Vanderlande Network communities and initiatives. Opportunity to collaborate globally. Being you @Vanderlande (Diversity statement) Vanderlande is an equal opportunity employer. Qualified applicants will be considered without regards to race, religion, colour, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Looking for a highly talented and a technically strong leader with an eye for quality to lead a high performing and talented team of engineers in the implementation domain for Display Sub-System. Able to handle multiple project execution that are time critical and complex Able to communicate effectively with all stakeholders across the organization Able to collaborate with cross functional teams for upholding the best practices and enabling smooth execution Focus on improving execution efficiency and improve on the optimizations in area, power and performance. Able to grow the team in terms of technical depth and size as we do more and more projects Able to innovate and bring fresh ideas Bachelors or masters degree in engineering with 9-13+ Years of experience. Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure. Experience in all aspects of timing closure for multi-clock domain designs. Should be familiar with MCMM synthesis and optimization. Should have good understanding of low-power design implementation using UPF. Experience with scripting language such as Perl/ Python, TCL. Experience with different power optimization flows or technique such as clock gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Responsibilities include: Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation. Development of signoff quality constraints and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. TCL script development in addition to running/analyzing/debugging designs. Hands on with Synopsys DCG/Genus/Fusion Compiler. Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains. Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development Experience with either RTL development or Physical Design is also a plus You may e-mail or call Qualcomm's toll-free number found . To all Staffing and Recruiting Agencies :

Role & responsibilities 8-10 Years of relevant Experience in PLM-3DExperience Platform in Customizations, Migrations, Configuration, and Installation Expertise in using ENOVIA toolkit Business, Navigator, Matrix Navigator, MQL, TCL, System, Spinner, UI3 components, JPOs, Triggers, Policy/Workflows, P&O and Enovia APIs. Programming Experience in Java, JSP, HTML, JavaScript and JSON Implementations. Good exposure and working experience in analyzing Functional Specification, High Level Design Documents and Technical Design Documents Experience in working with Agile and Waterfall methodologies Experience in migrating data to ENOVIA using – Java, TCL approaches. Developed several TCL programming Scripts for extracting and updating the existing Production Data Analyzing the functional requirements and translating functional requirements into High Level Designs, Technical requirements and customizing the application Build and developing the logic & writing the code as per the design document. Implementing Business Logic, developing the use cases. Debugging the issue raised by the user is valid /invalid and provides the optimum solution. Validating the impacted functionalities to make sure no regressions occur. Analyzing the requirement and making a draft of the design. Debugging, deploy & Responsible for fixing the bugs if occurred either at schema level or code level. Updating the status of the development to the manager in the weekly meetings. Participate in Design Review Calls with technical architects, get the Design Document reviewed to ensure no impact on other functionalities and get sign off by Technical Architects. Preferred candidate profile

Experience : 3 to 10 Years Qualification : Bachelors or Masters (Electronics and Communication Engineering or equivalent) Job Description: As an Emulation Engineer, youll be an integral part of a dynamic team dedicated to creating cutting-edge ASIC solutions for High-Performance Computing (HPC) systems. Your role will involve defining the validation strategy leading to functional sign-off for these high-performance computing designs. Key functions and responsibilities: Proficient in various emulation technologies, including simulation acceleration, in-circuit emulation, speed bridges, virtual prototyping, and hybrid methods. Familiarity with tools such as Palladium, Protium, Veloce, or Zebu. Good Knowledge of SystemC/C/C++ and UVM/SV verification languages Experience with SystemVerilog and C++ for modelling RTL components and transactors. Ability to develop C/C++/SystemC/SV tests in HDL-HVL (Hardware Description Language-Hardware Verification Language) Co-emulation platforms. Understanding of compilation and build flow. Skilled at building images from scratch, making necessary design modifications to adapt to emulation. Work closely with verification teams to define and implement comprehensive pre and post silicon test plans. Interface effectively with design, verification, validation, and software development teams to understand their needs from an emulation perspective. Experience in architecting emulation systems for various design scales (IP blocks, SOC, multi-chip systems). Balancing performance and ease of debug. Proficient in post-silicon bring-up, debugging, and issue reproduction on emulators. Familiarity with Python and TCL scripting languages. Exposure to domains such as PCIe, CXL, DDR, Flash, Memory, USB, and CPU. Strong communication and collaboration skills to work effectively with cross-functional teams and domain experts. Successfully manage multiple design releases and provide support for debugging customer issues.

An experienced PLM developer with in-depth knowledge of Teamcenter architecture, resource layer components such as DB and volume, Teamcenter Data Model, and database schema of Part, BOM, document management, and change management. Expertise in T4EA integration development to meet business and non-functional requirements. Proficiency in Teamcenter customization involving ITK, SOA, BMIDE, Rich Client plugin, and AWC. Programming experience in Teamcenter using C, C++, ITK, Java, XSL, XML, Angular JavaScript, TCL scripting, developing extensions, workflow handlers, and SOA services. Perform overall development, SVN management, JIRA management, production support, and maintenance activities. Create and maintain necessary documentation for the reports and integrations developed. Experience in developing business reports such as Bill of Material (BOM) comparison reports across systems, change management, drawing and document metadata, as well as integrating and transferring related dataset and its meta data to downstream, vendor and customer applications that are cloud and on prem hosted. Experience in authentication, authorization, and other security modules including Access Manager, ADA, and SSO integration. Experience in integrating Teamcenter with MCAD, ECAD, ERP, Polarion, and Rulestream. Proficiency in using JIRA & Confluence, Agile project methodology, and Sprint planning. Experience in Teamcenter deployment on cloud solutions like AWS, Azure, and Google Primary Skills Experience with Teamcenter integrations development. Experience with Active Workspace Client use. Experience in designing/architecting PLM/Teamcenter integration solutions including T4EA. Desired Experience Experience in using T4S / T4O for ERP Integration. Experience in using other OLAP, iPaaS like BOOMI, eQUBE -MI.

An experienced PLM developer with in-depth knowledge of Teamcenter architecture, resource layer components such as DB and volume, Teamcenter Data Model, and database schema of Part, BOM, document management, and change management. Expertise in T4EA integration development to meet business and non-functional requirements. Proficiency in Teamcenter customization involving ITK, SOA, BMIDE, Rich Client plugin, and AWC. Programming experience in Teamcenter using C, C++, ITK, Java, XSL, XML, Angular JavaScript, TCL scripting, developing extensions, workflow handlers, and SOA services. Perform overall development, SVN management, JIRA management, production support, and maintenance activities. Create and maintain necessary documentation for the reports and integrations developed. Experience in developing business reports such as Bill of Material (BOM) comparison reports across systems, change management, drawing and document metadata, as well as integrating and transferring related dataset and its meta data to downstream, vendor and customer applications that are cloud and on prem hosted. Experience in authentication, authorization, and other security modules including Access Manager, ADA, and SSO integration. Experience in integrating Teamcenter with MCAD, ECAD, ERP, Polarion, and Rulestream. Proficiency in using JIRA & Confluence, Agile project methodology, and Sprint planning. Experience in Teamcenter deployment on cloud solutions like AWS, Azure, and Google Primary Skills Experience with Teamcenter integrations development. Experience with Active Workspace Client use. Experience in designing/architecting PLM/Teamcenter integration solutions including T4EA. Desired Experience Experience in using T4S / T4O for ERP Integration. Experience in using other OLAP, iPaaS like BOOMI, eQUBE -MI.