SR. VERIFICATION ENGINEER

As a Sr. Verification Engineer for SOC Verification at SmartSoC, your role will involve the technical execution of SOC Verification projects for complex ARM based SOCs. You will be responsible for test planning, environment architecture, and developing SV-UVM environments to ensure the successful completion of projects. Key Responsibilities: - Technical execution of SOC Verification projects for complex ARM based SOCs - Test Planning, Environment Architecture, and development of SV-UVM environments Qualifications Required: - 3-10 years of experience in Design Verification - Excellent Communication and Presentation Skills - Expert Knowledge in SOC Verification - Proficiency in Verification Coverage Driven Test Planning, Architecting Environments, and Verification Flow - Strong knowledge in System Verilog - Familiarity with at least one methodology such as OVM, UVM, VMM, or RVM - Very Good knowledge of protocols, with expertise in at least one protocol of SATA, USB, Ethernet, or PCIE - Ability and willingness to learn new methodologies, languages, protocols, etc. Please note that the job category is VLSI (Silicon engineering) and the job locations include India (Bangalore, Chennai, Hyderabad, Noida), Sweden (Stockholm), and USA (Texas). Join SmartSoC's team of SOC Verification experts and be a part of exciting and challenging projects in the field of VLSI engineering.,