6 Protocol Exerciseranalyzers Jobs

In Lattice, you will be part of a worldwide community dedicated to developing programmable logic solutions that are transforming the industry. As part of the Silicon Engineering team, you will have the opportunity to validate building blocks in FPGA and ensure their functionality and performance. This role will involve working with cutting-edge equipment, advanced boards, and various software/tools/scripts. **Responsibilities & Skills:** - Opportunity to learn and participate in cutting-edge FPGA projects. - Validate and characterize various IPs within the FPGA. - Develop validation and characterization plans for specific IPs, bench hardware, and software. - Drive new silicon product bring-u...

As a Silicon Design Validation Engineer at Lattice, you will be part of a dynamic and enthusiastic community of engineers, designers, and specialists dedicated to developing cutting-edge programmable logic solutions that are revolutionizing the industry. Your role will involve validating building blocks in FPGA at the board level to ensure functionality and performance align with the design intent. Here's what you can expect in this role: - Validate various IPs within the FPGA, including SERDES (PMA/PCS), Memory DDR (DDR4, LPDDR4, DDR5, etc.), DPHY, PLL, DSP, Fabric, and I/O components. - Develop validation and characterization plans for specific IPs, bench hardware, and software. - Create t...

As a Silicon Design Validation Engineer at Lattice, you will have the opportunity to be part of a fast-paced and results-oriented environment where you can contribute to cutting-edge projects in FPGA technology. Your main responsibility will be to validate building blocks within the FPGA to ensure functionality and performance alignment with design intent. Here's what you will get to do in this role: - Validate building blocks in FPGA on board level, including IPs like SERDES (PMA/PCS), Memory DDR (DDR4, LPDDR4, DDR5, etc.), DPHY, PLL, DSP, Fabric, I/O, and more. - Learn and train yourself on the validation process and methodology required for different IPs. - Work with cutting-edge equipmen...

As a Silicon Design Validation Engineer at Lattice, you will have the opportunity to work on cutting-edge projects within Lattice's Silicon Engineering team. Your role will involve validating building blocks in FPGA on a board level to ensure functionality and performance align with the design intent. You will work with various IPs such as SERDES (PMA/PCS), Memory DDR (DDR4, LPDDR4, DDR5, etc.), DPHY, PLL, DSP, Fabric, I/O, and more. Your responsibilities will include developing validation and characterization plans, creating test logic RTL, driving new silicon product bring-up, and collaborating with cross-functional teams to ensure successful product release. Key Responsibilities: - Valida...

As a Silicon Design Validation Engineer at Lattice, you will be part of a dynamic and enthusiastic team working on cutting-edge projects in programmable logic solutions. If you thrive in a fast-paced and results-oriented environment and are passionate about innovation and self-challenge, this role offers you the opportunity to contribute to the validation and performance assessment of building blocks within FPGA. In this role, you will be responsible for validating and characterizing various IPs within the FPGA, such as SERDES, Memory DDR, DPHY, PLL, DSP, Fabric, and I/O components. You will have the chance to work on developing validation and characterization plans, test logic RTL, and driv...

As a Silicon Design Validation Engineer at Lattice, you will have the opportunity to be part of a dynamic team working on cutting-edge FPGA projects. This role involves validating building blocks in FPGA on the board level to ensure functionality and performance according to design intent. The FPGA includes various IPs such as SERDES (PMA/PCS), Memory DDR (DDR4, LPDDR4, DDR5, etc.), DPHY, PLL, DSP, Fabric, I/O, among others. In this position, you will learn how to validate one or many building blocks within the FPGA and gain knowledge of the process and methodology required for validating IPs from planning to completion. You will work with advanced equipment, boards, and software/tools while...