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Physical Design Engineer/Lead

Physical Design Engineer/Lead

SoCtronics

5 - 10 years

0 Lacs

hyderabad telangana

Posted:4 days ago| Platform: Shine logo

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Skills Required

physical design synthesis floor planning clock tree synthesis parasitic extraction timing closure physical verification dfm primetime tcl scripting perl scripting power planning place route clock planning analog ip integration powerir drop analysis signal integrity analysis dfy tapeout crosstalk delay analysis noise glitch analysis electrical rules analysis variations analysis modeling techniques synopsys icc2

Work Mode

On-site

Job Type

Full Time

Job Description

As an experienced Physical Design Engineer, you will be responsible for executing block level P&R and Timing closure activities. Your primary role will involve owning up block level P&R and performing Netlist2GDS on blocks. You will be working on the implementation of multimillion gate SoC designs in cutting-edge process technologies such as 28nm, 16nm, 14nm, and below. Your expertise should cover various aspects of physical design, including Synthesis, Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning and Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal Integrity Analysis, Physical Verification (DRC, ERC, LVS), DFM, and DFY, leading to Tapeout. In this role, you should have a strong ability to analyze and converge on crosstalk delay, noise glitch, and electrical rules in deep sub-micron processes. Understanding process variation effects and experience in variations analysis/modeling techniques and convergence mechanisms would be an added advantage. Proficiency in using Synopsys ICC2, PrimeTime physical design tools is expected from you. Additionally, skill and experience in scripting using Tcl or Perl would be highly desirable. Qualifications: - BE/BTech, ME/MTech (VLSI Domain Mandatory) Experience: - 5-10 years of relevant experience in physical design in the semiconductor industry. Please note that the location for this position is Hyderabad, Guntur.,

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Physical Design Engineer/Lead