FPGA RTL Design Engineer

As an FPGA RTL Design Engineer, you will play a crucial role in designing, implementing, and verifying digital logic for FPGA-based systems using VHDL/Verilog. Your responsibilities will include: - Designing and implementing digital logic using HDLs (VHDL, Verilog) - Developing optimized RTL code for complex FPGA designs - Performing functional simulation and timing analysis - Synthesizing and implementing FPGA designs using tools like Xilinx Vivado, Intel Quartus, Lattice Diamond, Actel Libero IDE - Integrating IP cores and developing custom IPs - Conducting hardware debugging and validation in the lab - Collaborating with PCB designers - Documenting design specifications, test plans, and results - Participating in design reviews and continuous improvement processes To qualify for this role, you should have: - A Bachelors degree in Electronics / Electrical Engineering - 2+ years of experience in FPGA design and RTL coding - Strong proficiency in Digital design, RTL coding in VHDL, Verilog - Experience with FPGA design tools (Vivado, Quartus etc.) - Familiarity with timing closure, floor planning, and constraint management - Strong proficiency in simulation tools, testbenches, and hardware debugging - Good understanding of digital logic, finite state machines, bus protocols - Knowledge of SoC FPGA platforms (e.g., Zynq, Stratix 10 SoC) - Strong problem-solving and communication skills,