501 Design Verification Jobs - Page 2

Job Description We are looking for an experienced Design Verification Engineer to join our team and contribute to the verification of complex SoC/ASIC designs. The ideal candidate will have strong expertise in verification methodologies, testbench development, and debugging. Key Responsibilities: Develop and implement verification plans, environments, and testbenches using SystemVerilog/UVM. Write and execute test cases for functional, regression, and coverage-driven verification. Perform debugging and root cause analysis for design and verification issues. Collaborate with RTL design, architecture, and validation teams to ensure quality deliverables. Analyze functional coverage metrics and enhance test suites for improved quality. Work on assertion-based and formal verification techniques where applicable. Contribute to automation and scripting to streamline verification flows.

This Job Role is part of Job Family "Research&Development" / Sub-Job-Family "R&D Systems Engineering" and includes jobs related to systems engineering according to the V-model including overall requirements management (ie transformation of customer requirements into internal requirements and cascading to appropriate disciplines), designing system architecture and system specification, leading functional safety development and compliance, system testing and assurance of regulatory approvals. ELECTRICAL EXPERT DESIGN ENGINEER NEW PRODUCT DESIGN AND DEVELOPMENT (m/f/d) Define and own the electrical motor development for new products: convert system requirements into detailed motor specifications (power, torque-speed envelope, insulation class, efficiency class, thermal limits, vibration targets, EMC, protection degree, etc.). Select and specify motors for pumps, fans, and auxiliaries- Single speed & Double speed motors. Lead technical discussions with global motor suppliers: evaluate design proposals, align on materials (laminations, winding wires, insulation systems), negotiate technical clauses, and release the final specification. Design rules and best practices for grounding and equipotential bonding across gear units, auxiliaries, and control cabinets; ensure consistent application across projects. Benchmark and align with digitalization team on controls, define sensor data protocols, SCADA systems, evaluate CAN/PROFINET/Modbus architectures, and ensure interface compatibility with turbine OEM systems. Plan and execute the Design Verification & Validation (DVP&R) for motors, drives, and auxiliary electrical componentsensuring tests comply with IEC 60034 series, IEC 61800-9-2, ISO 1940, and customer-specific standards. YOUR PROFILE AS ELECTRICAL EXPERT DESIGN ENGINEER NEW PRODUCT DESIGN AND DEVELOPMENT (m/f/d) Bachelors / Masters in Electrical Engineering; 58 years of experience in motor and electrical system design, supplier interaction, and IEC-based qualification. Proven expertise with IEC 60034, IEC 60349, IEC 61800, IEEE 112, ISO 9001, and related test methodologies (type, routine, endurance, surge, partial discharge, vibration, noise, thermal rise, IP). Motor construction (stator/rotor laminations, winding schemes, insulation systems, bearing arrangements, cooling concepts). VFD-based drive systems, dual-speed motors, and single-speed motors, including selection criteria, efficiency impacts, and control integration. Auxiliary components (drives, sensors, junction boxes, cables, grounding).Dynamometer, power-analyzer, and DAQ systems for performance and efficiency assessment. Designing and certifying electrical cabinets, cable trays, routing plans, and equipotential bonding systems. Strong communication skills in English, with the ability to explain complex electrical and digital topics to multidisciplinary and executive audiences.Curiosity, self-initiative, and a continuous-improvement mindset.

Education: Bachelors degree (BE/B.Tech)orMasters degree (ME/M.Tech) Roles & Responsibilities: Acquire knowledge microarchitecture an ASIC unit by studying the specification and interacting with the logical design team. Write and perform the test plan in close cooperation with the logical design team. Develop coverage models and verification environments using UVM-SystemVerilog C++. Write, maintain and publish the verification specification. Monitor, analyze and debug simulation errors. Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time. Produce a maintainable and reusable code across projects Required Skills and Experience Curious, demanding and rigorous. Mastering object oriented programming. Knowledge of UVM verification methodology (or equivalent) and SystemVerilog SystemC hardware verification languages Knowledge of Constraint-Random Coverage-Driven verification environments development in SystemVerilog C ++ (drivers monitors, constraint random tests, checkers and self-checking models and coverage models written in SystemVerilog-Covergrourp SVA) Knowledge of simulation tools and coverage database visualization tools Effective in problems solving by rapidly identifying their root cause and developing patches or workarounds under tight timing constraints. Our Offering: Competitive salary package Leave Policies: 10 Days of Public Holiday (Includes 2 days optional) & 22 days of Earned Leave (EL) & 11 days for sick or caregiving leave. Benefit Plans (Insurance) Medical & Life & Accidental & EDLI

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Collaborate with design and verification teams to understand digital design specifications and ensure comprehensive verification coverage. Develop and execute verification plans for ASIC/FPGA designs using directed tests and/or SystemVerilog with UVM methodologies. Build and maintain testbenches, verification components, and assertion-based verification structures to validate complex digital designs. Perform simulation, debugging, and coverage analysis to ensure functional correctness and compliance with design requirements. Contribute to the automation of verification flows through scripting (Python, Perl, Bash) to improve productivity and consistency. Work in Unix/Linux environments for development, simulation, and regression testing activities. Document verification strategies, results, and maintain clear communication with cross-functional teams to support project milestones. Actively participate in code reviews and contribute to continuous improvement of verification methodologies and best practices. Skills Must have 6+ years of experience. Strong in digital design. Skills in ASIC / FPGA verification (directed test or System Verilog / UVM) A good knowledge of simulation flow Good basis in scripting Python, Perl, Bash. Proficiency in Unix environment. Good communication skills Nice to have Bachelor's/Master's in ECE

BOQ, Estimation preparation. Develop detailed drawings and specifications for production and execution. Conduct site visits for measurements, design verification, and quality checks. Knowledge of materials, hardware, and modular systems.

Design Verification: SV/UVM Test Bentch Developement Any Protocols: PCI Express or UCIe, CXL or NVM • AXI, ACE or CHI • Ethernet, RoCE or RDMA • DDR or LPDDR or HBM) • 6+ years of hands-on DV experience in System Verilog/UVM. •Must be able to own and drive the verification of a block / subsystem or a SOC. •Extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM. Physical Design: •In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. - Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. Floor Planning/Innovus/Fusion Compiler Experience on programming in Tcl/Tk/Perl. Physical Design Methodologies and submicron technology of 28nm and lower technology nodes. • Should have experience on Physical Design Methodologies and submicron technology of 28nm and lower technology nodes. •Well versed with timing constraints, STA and timing closure. •Should have experience on Physical Design Methodologies and submicron technology of 28nm and lower technology nodes. •Should have experience on programming in Tcl/Tk/Perl • Well versed with timing constraints, STA and timing closure. ASIC RTL Design: • 6+ years experience in RTL, Asic Coding, Design, IP Design, SOC Development, Lint, CDC • PCIe/DDR/Ethernet - Any One • I2C,UART/SPI - Any One • Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One • Scripting languages like Make flow, Perl ,shell, python - Any One DFT Engineer: Interface with ASIC design teams to ensure DFT design rules and coverages are met. Generate high-quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques. MBIST verification (including repair), test pattern generation through Mentor tool. ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations. Work with Product/Test engineering teams on the delivery of manufacturing test patterns for ATE. Analog Circuit Design Lead: 1. 6+ years of Experience in entire Analog IP development including circuit design, layout, AMS verification, and characterization. 2. Must have led the entire Analog IP development cycle and team. 3. Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs, Oscillators, General Purpose IOs, Temperature sensor, SERDES, PHYs, Die to Die interconnect, High-speed IOs, etc. 4. Analog/custom layout design in advanced CMOS process. 5. Ability to understand design constraints and implement high-quality layouts. 6. Conceptualize and implement chip-level mixed signal simulation environments (testbenches, run scripts, etc...). 7. Hands-on experience on lower FINFET technology nodes and design/PPA trade-offs.

As part of Texas Instruments (TI), you have the opportunity to contribute to cutting-edge technology that is powering the world's future innovations. Your role will involve leading the design and development of high-efficiency switching converter designs, guiding package and pinout selections for optimal power delivery, and ensuring designs meet performance and reliability standards. You will stay updated on the latest advancements in analog design and technology, encourage innovation within the team, and continuously enhance design processes. Collaboration and communication are key aspects of this role, as you will work closely with other engineering teams to integrate analog designs into larger systems. You will communicate project status, challenges, and solutions to senior management and stakeholders, and interface with customers and partners to understand requirements and provide technical support. The qualifications for this role include a Bachelor's degree in Electrical Engineering and a minimum of 4 years of relevant experience. Preferred qualifications include a Bachelor's or Master's degree in electrical engineering or a related field, along with expertise in analog circuit design, particularly in switching converters, high voltage, or high-power designs. Proficiency in EDA tools, floorplan and layout reviews, problem-solving skills, and strong communication abilities are also desired. At TI, we empower our employees to take ownership of their career development and collaborate with some of the brightest minds in the industry. Our commitment to creating a better world through affordable electronics drives our passion for innovation. If you are ready to engineer your future and contribute to shaping the future of electronics, we look forward to hearing from you. Texas Instruments is an equal opportunity employer that values diversity and inclusivity in the workplace. If you are interested in this opportunity at our Bagmane Cosmos Tech Park location in Bengaluru, please apply to the requisition number 25002188.,

The role of Senior Engineer - Electrical Design requires a candidate with a Diploma / B.Tech/B.E. in Electrical engineering with a minimum of 3 years of experience in a similar role. The preferred work location for this position is Vadodara. As a Senior Engineer - Electrical Design, your responsibilities will include working on solenoid assembly & its components design, modelling, drafting, BOM preparation, SAP activities, and testing troubleshooting. You will be expected to understand the basic function & configuration rules of all SOV, Coil, and Valve products. Additionally, you will create product string building rules for standard catalog products, NCPs, and ETOs, and modify Mrktg. & Production codes, Item Code & Drawing Numbers. You will collaborate with customers/sales for product requirements gathering, compliance report preparation, and product specification sheet filling. Independent activities such as benchmarking/Reverse Eng., VA/VE activities, product design tasks, design verification, and design reviews will be part of your routine. Moreover, you will be responsible for preparing design documents for product certifications and resolving various problems through the 8D process. The ideal candidate for this position should have expertise in software tools such as SolidWorks, ANSYS-Maxwell, and MS-Office. Knowledge of QMS requirements, tools like DFMA, 8D (RCA and CAPA), and processes including Machining, Plastic Injection Moulding, Gravity/Die Casting, and Sheetmetal is essential. Interested candidates meeting the qualifications are requested to email their CV to pooja.roy@rotexautomation.com with the subject line "Senior Engineer - Electrical Design" and provide the following details: 1. CANDIDATE NAME: 2. CURRENT ORG: 3. TOTAL EXP: 4. Experience in design role: 5. CURRENT CTC: 6. EXPECTED CTC: 7. NOTICE PERIOD: 8. EDUCATION: 9. PERCENTAGE IN BE: 10. WILLING TO RELOCATE TO BARODA: 11. Do you have expertise in SolidWorks 12. Do you have software Knowledge in ANSYS-Maxwell 13. Do you have Tools Knowledge in DFMA, 8D (RCA and CAPA) ,

You will be responsible for designing and optimizing memory architectures for high-performance and low-power applications as a skilled SRAM & ROM IC Memory Design Engineer. Your main tasks will include designing, simulating, and verifying SRAM and ROM memory blocks while collaborating with cross-functional teams in circuit design, layout, verification, and technology development. Key responsibilities for this role include designing and developing SRAM and ROM memory architectures for various semiconductor applications, performing transistor-level circuit design and simulation, optimizing power, performance, and area (PPA) of memory designs, conducting timing, reliability, and variation analysis, working closely with physical design engineers, implementing redundancy and error correction techniques, and supporting design verification and validation processes. To qualify for this position, you should have a Bachelor's or Master's degree in Electrical Engineering or a related field, along with at least 3 years of experience in SRAM/ROM memory design for semiconductor applications. Strong knowledge of CMOS circuit design, transistor-level simulation, and memory architecture is required, as well as experience with circuit simulators such as SPICE, Spectre, HSPICE, and proficiency in tools like Cadence Virtuoso, Synopsys Custom Compiler, or equivalent. Join us at onsemi (Nasdaq: ON), where we are dedicated to driving disruptive innovations for a better future, focusing on automotive and industrial end-markets. We are at the forefront of megatrends such as vehicle electrification, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a diverse and innovative product portfolio, we create intelligent power and sensing technologies that address the world's most complex challenges and pave the way towards a safer, cleaner, and smarter world. For more information on our company benefits, please visit: https://www.onsemi.com/careers/career-benefits At onsemi, we are committed to attracting high-performance innovators and providing all candidates with a positive recruitment experience that showcases us as a great place to work.,

Join a team that values innovation, growth, and impactful work. Don't miss the chance to work with cutting-edge projects in SME and be a part of something transformative! Drive Date: 26th July Saturday (9AM-2PM) Skills Required: - Experience in DHF remediation - Proficiency in Design Control, Design Verification, and Design Validation - Expertise in WindchillPLM in the medical domain Venue Location: HCLTech Elcot Sez, New Cafeteria 2nd Floor, 602/3, 138, Medavakkam High Road, Sholinganallur, Chennai-600119 Position: Mechanical Design (Lead, Technical Lead) Experience: 2.5-10 years Job Location: Chennai Job Description: - B.E / B.Tech or higher education in Mechanical Engineering - Sustaining Engineers should have 3 to 7 years of experience in Medical Device Design Controls, Design Verification & Validation - Proficient in Design Control processes for Medical Devices - Led Change Qualification projects for medical devices, working with multi-cultured CFT - Experience in developing test protocols and test plans - Ensures quality of deliverables, including design, data summary and interpretation, and report generation - Expertise in Mechanical Engineering basics - Proficient in Risk Management (Proactive risk identification and mitigation planning) - Self-motivated and capable of working independently with strong project management skills - Knowledge of ISO13485 would be an added advantage - Excellent Oral and written Communication skills with proven Technical writing skills and interpersonal skills Software Tools: - SolidWorks, 2D Tolerance Stackup, MS Word/Excel/PowerPoint Skill 2 Job Description (DHF Remediation): - Experience in gap assessment processes such as Testing gap assessment, Standards gap assessment, Requirements gap assessment - Knowledge in Design History File remediation Skill 3 Job Description (WindchillPLM - Medical Domain): - Proficiency in WindchillPLM in the medical domain, BOM structure, and Change order process Interested candidates can share their CV to Katherinesylvia.k@hcltech.com with the following details: Current Company, Current CTC, Expected CTC, Notice Period, Location. CONSIDER THIS AS CALL LETTER,

You have a unique opportunity to join Astera Labs, a global leader specializing in purpose-built connectivity solutions that unleash the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform seamlessly integrates PCIe, CXL, and Ethernet semiconductor-based solutions along with the COSMOS software suite, offering a software-defined architecture that is not only scalable but also customizable. Building on strong relationships with hyperscalers and the data center ecosystem, we are at the forefront of innovation, delivering flexible and interoperable products that are transforming modern data-driven applications. Explore more about our groundbreaking work at www.asteralabs.com. As a candidate, you should possess a Bachelor's degree in electrical engineering (EE), with a preference for a Master's or Ph.D. in EE, accompanied by a background in Math or Computer Science. You should have a minimum of 8 years of experience in formal verification or 7 years in traditional design verification (DV). A strong work ethic, adept at managing multiple tasks in a dynamic environment, is essential. Your ability to plan for customer meetings, work independently, and exhibit an entrepreneurial mindset with a customer-centric approach are key attributes. Proficiency in cross-functional collaboration is also vital for this role. Your responsibilities will include developing detailed formal verification (FV) test plans based on design specifications and collaborating with design teams to enhance micro-architecture specifications. You will identify crucial logic components and micro-architectural properties to ensure design correctness. Implementing formal verification models, abstractions, and assertions, utilizing assertion-based model checking to detect corner-case bugs will be part of your role. You will apply complexity reduction techniques, develop scripts for enhanced productivity, and assist in implementing assertions and formal verification testbenches for RTL at unit/block levels. Your involvement in design reviews and collaboration with design teams to optimize design quality based on formal analysis feedback will be crucial. Proficiency in System Verilog/Verilog and scripting abilities with Python or Perl are required. Preferred candidates will have hands-on experience with formal verification tools like Synopsys VCFormal and Cadence JasperGold, along with familiarity in automating formal verification workflows within a CI/CD environment. At Astera Labs, we value diversity and inclusivity, believing that creativity and innovation thrive in a team with varied ideas, backgrounds, and experiences. We actively encourage individuals with diverse backgrounds, including people of color, LGBTQ+ and non-binary individuals, veterans, parents, and persons with disabilities, to apply and be part of our dynamic team.,

MIPS is looking for a highly experienced and motivated Engineering Manager to lead the CPU team. In this critical role, you will manage a team of skilled engineers dedicated to developing high-performance CPU cores based on the RISC-V architecture. Your responsibilities will include overseeing the entire RTL design lifecycle, ensuring technical excellence, innovation, and timely delivery. You will lead and mentor a team of microarchitecture and RTL design engineers focused on high-performance CPU core development. Your role will involve driving the design execution of CPU subsystems, meeting performance, power, area, and quality goals. You will be responsible for creating and refining microarchitecture specifications and RTL designs for CPU core components, collaborating with various teams to ensure efficient implementation, optimizing design methodologies for scalability and quality, and fostering a culture of innovation and technical excellence. The ideal candidate should have a Master's or PhD in Electrical Engineering, Computer Engineering, or a related field, with at least 15 years of experience in silicon or CPU design, including 5+ years in a management role. A proven track record of successfully delivering complex CPU blocks or subsystems, deep understanding of microprocessor design principles, strong technical knowledge in RTL design, and experience with project management and organizational skills are required. Preferred qualifications include experience with RISC-V, MIPS, or ARM CPU cores, familiarity with advanced CPU design concepts, working in a globally distributed environment, proficiency with EDA tools and scripting languages, and modern design methodologies. Joining MIPS offers you the opportunity to work with a dynamic and fast-growing team that is shaping the future of high-performance RISC-V processors. With small, agile teams and a flat organizational structure, you will have a direct impact on cutting-edge technology and product direction. MIPS provides an autonomous and empowering work culture, the chance to collaborate with industry-leading engineers, competitive compensation and benefits, and a platform for career growth in the exciting RISC-V ecosystem.,

This role is for a SoC Verification Engineer to join a verification team with the primary goal of achieving first-pass silicon success. The ideal candidate will have extensive experience in the verification of complex Systems-on-Chip (SoCs), and will be responsible for driving verification strategies, developing test environments, and ensuring design quality through rigorous analysis. Responsibilities Drive the overall verification strategy and write detailed Test Plans . Develop comprehensive Test Benches and Test cases using industry-standard tools, methodologies, and High-Level Verification Languages (HVLS). Analyze Code Coverage, Functional Coverage, and Assertions to ensure thorough verification. Actively debug and resolve complex verification issues to ensure a successful first-pass silicon. Skills Solid experience in the verification of complex SoCs . Expertise in SoC Verification using C and Verilog . Expertise in AMBA protocols like AXI/AHB/APB and experience working with ARM Processors . Strong skills in Test Plan creation and verification technologies like Code Coverage . Good knowledge of gate-level simulation and scripting languages like Perl and TCL . Excellent debugging and problem-solving skills . Knowledge of SV and UVM is a plus. Verification experience in complex protocols like USB, PCIe, DDR, or UFS is highly desirable. Qualifications A B.Tech. or M.Tech. degree with at least 6 years of solid experience in the verification of complex SoCs. Immediate availability is preferred.

This role is for an IP Verification Engineer to join an IP verification team, dedicated to achieving first-pass silicon success. The ideal candidate will have solid experience in the verification of complex IPs or SoCs, and will be responsible for driving verification strategies, developing test environments, and ensuring design quality through rigorous analysis. Responsibilities Drive the overall verification strategy and write detailed Test Plans . Develop comprehensive Test Benches and Test cases using industry-standard tools, methodologies, and High-Level Verification Languages (HVLS). Analyze Code Coverage, Functional Coverage, and Assertions to ensure thorough verification. Actively debug and resolve complex verification issues to ensure a successful first-pass silicon. Skills Solid experience in the verification of complex IPs or SoCs . Expertise in IP Verification using SV/UVM . Expertise in AMBA protocols like AXI/AHB/APB. Strong skills in Test Plan creation and verification technologies. Good knowledge of gate-level simulation and scripting languages like Perl and TCL . Excellent debugging and problem-solving skills . Verification experience in complex protocols like USB, PCIe, or DDR is highly desirable. Qualifications A B.Tech or M.Tech degree with relevant experience. Immediate availability is preferred.

Job description Meta is looking for ASIC Engineer, Design Verification to join our dynamic team and embark on a rewarding career journey. Develop and implement ASIC design methodologies, including design, verification, and testing Collaborate with cross-functional teams to identify and understand requirements and develop solutions that meet business needs Develop and maintain design specifications, test plans, and documentation Participate in the full ASIC development cycle, including architecture, RTL design, verification, and synthesis Perform design optimization and analysis to ensure optimal performance and power efficiency Ensure compliance with industry standards and guidelines. Strong knowledge of ASIC design methodologies and tools. Excellent communication and interpersonal skills Strong analytical and problem-solving skills

Job description Meta is looking for ASIC Engineer, Design Verification to join our dynamic team and embark on a rewarding career journey. Develop and implement ASIC design methodologies, including design, verification, and testing Collaborate with cross-functional teams to identify and understand requirements and develop solutions that meet business needs Develop and maintain design specifications, test plans, and documentation Participate in the full ASIC development cycle, including architecture, RTL design, verification, and synthesis Perform design optimization and analysis to ensure optimal performance and power efficiency Ensure compliance with industry standards and guidelines. Strong knowledge of ASIC design methodologies and tools. Excellent communication and interpersonal skills Strong analytical and problem-solving skills

Review,Author, Execute, perform, summarize, report out verification & validation test activities of components to a full system device: Which includes but not limited to: Test Plans, Test Procedures, User and Functional Requirements testing, Design Verification, Installation/Operational/Performance Qualification Protocols, Traceability Matrices and Final Reports. Support compliance/ closure of Regulatory and Quality requirements before completing Design Outputs/ Program Deliverables. Clear understanding of the elements of Risk Management, FMEA, critical / Essential parts identification, System reliability, Life / limits testing and related V&V tasks. Participate in the development of Verification & Validation methodologiesin accordance withapplicable Quality/Regulatory requirements and industry bestpractices Lead the qualification of lab area, productivity improvement efforts, including testing, building fixtures,calibrationand data collection. Diagnose,isolateand investigate problem reports. Drive product improvements and/or bug fixes. Ensure good documentation and Good Manufacturing practices are followed in the Verification and Validation Process Participate in continuous improvement activities by supporting the implementation of process and product quality improvementinitiatives Deep knowledge in test automation tools and realizing test automation suite. Work closely with the auditees to understand the details and support with all relevant objectiveevidences Adheres to Baxter Quality Management system & supportsthe qualityaudits. Support on-going regulatory agency inspection readiness through the self-assessment program to include mock inspections and compliance with revised and emerging regulations. Pair up with design & development team to start the testing early in the design cycle to ensure the requirements testability, design traceability & test coverage.Identifyissues early to fixthe same. Refine the test plans and procedures through pre-verifications / Dry runs. Interacts with design team to resolve tests-related technical issues. Presents the findings / objectiveevidencesand able to present with rationale with applicability / exclusions Identifyand report any quality or compliance concerns and take immediate corrective / Preventive action as needed. What you'llbring Bachelor's degree in Electrical Engineering, Software Engineering, Computer Science, Bio-Medical, Industrial Engineering or related field 6to 10yrsof experience in Verification and validation testing ofSoftware andhardware. Relevant technical testing/reliability experience in electro-mechanical, electrical, or software testing. Understanding of hardware schematic diagrams and debugging tools like IC5000, CAN Analyzer,Trace 32, Keil IDE, PEAK analyzer, Oscilloscope Any scripting knowledge like python, shell etc. Good programming knowledge and basic understanding of Embedded programming. Understanding of modeling( MATLAB, Simulinketc) Test framework development and test harness development knowledge. Knowledgeonhardware in loop and software in loop testing. An understanding of test methods and processes as well as the methods used to verifyproductin the realmsof;software, mechanical, electrical, functional and environmental testing environments. Experience in - writing system, subsystem-level and module level verification and validation plans, procedures, Test Execution and Test reportgeneration Understanding of hardware and software product design methodologies and test practices. Familiarity with reliability theory and analysis as it pertains to test quantities derived from reliability. Experience in medical device or similar product development, design verification/validation,softwareintegration (involving software & hardware), risk management, reliability engineering, process validation and Qualitysystems Deep domain knowledge in design verification and validation of medical devices is aplus Understanding of and adherence to FDA, ISO and IEC design control procedures,regulationsand standards. Demonstrated experience in accomplishingobjectives. Able to deliver on multiple projectssimultaneously Self-motivated with good interpersonal skills

Author, Execute, perform, summarize, report out verification & validation test activities of components to a full system device: Which includes but not limited to: Test Plans, Test Procedures, User and Functional Requirements testing, Design Verification, Installation/Operational/Performance Qualification Protocols, Traceability Matrices and Final Reports. Support compliance/ closure of Regulatory and Quality requirements before completing Design Outputs/ Program Deliverables. Participate in the development of Verification & Validation methodologies in accordance with applicable Quality/Regulatory requirements and industry best practices Lead the qualification of lab area, productivity improvement efforts, including testing, building fixtures, calibration and data collection. Diagnose, isolate and investigate problem reports. Drive product improvements and/or bug fixes. Ensure good documentation practices are followed in the SW Verification and Validation Process Participate in continuous improvement activities by supporting the implementation of process and product quality improvement initiatives Participate in V&V development process improvement and test automation. Maintains awareness of current regulatory trends and their impact on the Verification and validation status of equipment and processes. Support the SMEs on Regulatory responses and Audits, as needed. Pair up with design & development team to start the testing early in the design cycle to ensure the requirements testability, design traceability & test coverage. Identify issues early to fix them. Refine the test plans and procedures through pre-verifications / Dry runs. Interacts with design team to resolve tests-related technical issues. Presents the findings / objective evidence and able to present with rationale with applicability / exclusions Identify and report any quality or compliance concerns and take immediate corrective / Preventive action as needed. What you'll bring: Bachelor's degree in mechanical engineering, Electrical Engineering, Software Engineering, Computer Science, Bio-Medical, Industrial Engineering or related field 3 to 6 yrs of experience in Verification and validation testing of Software and hardware. Relevant technical testing/reliability experience in software testing & automation. Any scripting knowledge like python, shell etc. Good programming knowledge on selenium for automation testing. Experience in desktop application, web application testing. Understanding of software architecture (web applications using Angular, microservice & cloud) Test framework development and test harness development knowledge. Knowledge on software in loop testing. Relevant technical testing/reliability experience in software testing and test methods and processes. Experience in - writing System, subsystem-level and module level software verification and validation plans, procedures, Test Execution and Test report generation. Understanding of software product design methodologies and test practices. Experience in medical devices or similar products in software integration. Deep domain knowledge in design verification and validation of medical devices is a plus. Understanding of and adherence to FDA, ISO and IEC design control procedures, regulations and standards. Demonstrated experience in accomplishing objectives. Able to deliver on multiple projects simultaneously. Self-motivated with good interpersonal skills Good Team player.

Job Description Change the world. Love your job. Texas Instruments is seeking Design Verification Engineer. In this role you will confirm the accuracy of designs for analog and mixed signal electronic parts, components, or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems before pattern generation/mask development. The role will require working independently from the product development team who designed the devices to confirm adherence to known design rules, procedures, and best practices. Additional job functions include analyzing equipment to establish operating data and conducting experimental tests and evaluating results to confirm the device meets all requirements in the specifications. You may also run software simulations, selecting components and equipment based on analysis of specifications and reliability. As a Design Verification Engineer you may also review vendor capability to support product development. Requires a BS degree or equivalent experience in the design of equipment, components or circuitry. Qualifications Minimum requirements Minimum education (i.e., bachelor&aposs degree in electrical engineering) Minimum of 3 years of experience Preferred Qualifications Ability to establish strong relationships with key stakeholders critical to success, both internally and externally Strong verbal and written communication skills Ability to quickly ramp on new systems and processes Demonstrated strong interpersonal, analytical and problem-solving skills Ability to work in teams and collaborate effectively with people in different functions Ability to take the initiative and drive for results Strong time management skills that enable on-time project delivery About Us Why TI Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. We&aposre different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. About Texas Instruments Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. If you are interested in this position, please apply to this requisition. About The Team TI does not make recruiting or hiring decisions based on citizenship, immigration status or national origin. However, if TI determines that information access or export control restrictions based upon applicable laws and regulations would prohibit you from working in this position without first obtaining an export license, TI expressly reserves the right not to seek such a license for you and either offer you a different position that does not require an export license or decline to move forward with your employment. Show more Show less

You are invited to apply for a job opportunity in Bengaluru and Hyderabad if you meet the qualifications for any of the following positions: ASIC RTL Design Engineers Design Verification Engineers Analog Design Engineers Linux Device Driver Engineers Blue-Tooth Engineers Specific experience requirements include: - RISC-V processor experience, 4+ years, in Bangalore - Design Verification with PCIE, 5+ years, in Bangalore - DFT with Synopsys Tool experience (Tetrax max / Verdi), 4+ years, in Bangalore and Hyderabad - RTL Design Development, synthesis, CDC, LEC, and static timing analysis The positions available are suitable for individuals with 4 to 15 years of experience. Multiple positions are currently open in both locations.,

Qualcomm India Private Limited is seeking a Systems Engineer to join the Engineering Group, specifically focusing on Systems Engineering related to GPU architecture and optimization. As a Systems Engineer at Qualcomm, you will play a crucial role in analyzing and evaluating GPU architecture and microarchitecture to enhance performance and power efficiency. Your responsibilities will include GPU power modeling, workload analysis, profiling, and characterizations. You will be tasked with minimizing power consumption in GPU registers, logic, memory, and clock components. Additionally, you will be involved in developing and maintaining tests for both pre-silicon and post-silicon power verifications. Collaboration is key in this role as you will work closely with various teams such as RTL designers, architects, design verification specialists, compiler experts, driver developers, silicon implementation teams, and post-silicon teams. Knowledge of Graphics architecture is considered a plus for this position. To be considered for this role, you should possess a Bachelor's degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or a related field. A minimum of 2 years of experience in ASIC design and verification, as well as low-power ASIC optimization, is required. Furthermore, Qualcomm requires candidates to meet certain minimum qualifications based on their level of education and years of experience in Systems Engineering. A Master's or PhD degree in relevant fields along with a specified number of years in Systems Engineering will also be considered. Preferred qualifications for this position include a Master's or PhD degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field. You should have at least 3 years of experience in advanced CPU/GPU architecture and microarchitecture design development, 5 years of experience in VLSI design and verification, and proficiency in industry tools such as PrimeTime PX and Power Artist. Experience with programming languages like C/C++, scripting languages such as Python/Perl, Assembly, Verilog/SystemVerilog, and Design Verification skills are highly valued. Knowledge of Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development, as well as GPU driver and compiler development, will be advantageous. Qualcomm is an equal opportunity employer and is committed to providing reasonable accommodations for individuals with disabilities throughout the application and hiring process. If you require accommodation, you can reach out to disability-accommodations@qualcomm.com. As a prospective employee of Qualcomm, you are expected to comply with all applicable policies and procedures, including those related to security and the protection of confidential information. Please note that Qualcomm's Careers Site is intended for individuals seeking employment directly with Qualcomm. Staffing and recruiting agencies or individuals represented by such agencies are not authorized to submit profiles, applications, or resumes through the site. For more information about this Systems Engineer role at Qualcomm, you can contact Qualcomm Careers directly.,

The Infra Silicon team at Meta is responsible for designing and building in-house hardware accelerator Application-Specific Integrated Circuits (ASICs) to enhance Meta's computing with capacity and efficiency at lower power and cost. The team focuses on creating domain-specific System on Chips (SoCs) that enable Meta's data centers to execute computationally-intensive workloads, such as video transcoding and AI/ML, with higher performance and lower energy consumption. They are organized into several key areas, including architecture & algorithms, design & micro-architecture, design verification, implementation & backend design, emulation/prototyping, and system on chip (SoC), which collaborate extensively with other teams to deliver comprehensive solutions for various technical domains.,

As an experienced Design Verification professional with over 8 years of experience, you will be responsible for working with a large Semicon Services Organization with revenue exceeding 400 million USD. The ideal candidate will be located in Pune or Bangalore and possess a strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM) based verification. In this role, expertise in memory controller or cache verification will be crucial. Additionally, the ability to effectively debug complex issues is a must-have skill for this position. If you are interested in this exciting opportunity, please contact Uday at Mulya Technologies via email at muday_bhaskar@yahoo.com. Join us in "Mining The Knowledge Community" and be part of a dynamic team driving innovation in the semiconductor industry.,

Description We are seeking an experienced RTL Design Engineer to join our team in India. The ideal candidate will have 6-15 years of experience in designing and verifying RTL for complex digital systems. You will be responsible for creating high-quality RTL designs that meet performance and power specifications. Responsibilities Design and implement RTL code for digital circuits using VHDL or Verilog. Perform functional verification of RTL designs using simulation tools. Collaborate with cross-functional teams to define design specifications and requirements. Optimize designs for performance, area, and power consumption. Debug and troubleshoot RTL designs and resolve any issues during the development process. Participate in design reviews and provide constructive feedback to peers. Skills and Qualifications Proficient in RTL design using VHDL or Verilog. Experience with synthesis tools such as Synopsys Design Compiler or Cadence Genus. Familiarity with digital design principles and methodologies. Knowledge of FPGA and ASIC design flows. Strong understanding of timing analysis and optimization techniques. Experience with simulation tools like ModelSim or QuestaSim. Ability to work collaboratively in a team environment and communicate effectively.

Our creative and versatile Physical Design team in Bangalore, India. As a member of this team you will be involved in creating next generation innovative networking chips in advanced process node. You will drive the backend process through the entire RTL 2 GDS Implementation flow including hierarchical floor planning, place route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, with special focus on performance die size optimization. What you will do: Analyzes current generation quality and efficiency gaps to identify proper incremental or evolutionary changes to the existing physical design related Tools, Flow and Methodology. Work closely with various teams such as physical design, RTL, DFT, tool/flow owners, and EDA vendors to improve physical design methodologies. Good understanding of different CTS strategies and providing the feedback to Implementation Team. As member of physical design team, drive methodologies and best known methods to streamline and automate physical design work. STA setup, convergence methodology, reviews and sign-off for Multi-Mode and Multi-corner designs. Good at Timing ECO Implementation strategy development/convergence. Should have an experience in enabling the Tweaker/Primetime based ECO flows. Work on Automation scripts within STA tools for Methodology development Excellent debugging skills in implementation issues and ability to produce creative solutions. Evaluate multiple timing methodologies/tools on different designs and technology nodes. Good scripting skills (TCL/SHELL/PERL/Python) is a MUST Who you are: You are an ASIC engineer with 6+ years of related work experience with a broad mix of technologies including: All aspects of ASIC Physical implementation including Floor planning, Clock and Power distribution, global signal planning, I/O planning and hard IP integration. Hierarchical design implementation approach, Timing closure, physical convergence. Power Integrity Analysis Experience with large designs (>100M gates) utilizing state of the art sub 16/14/7/5/3nm technologies. Familiarity with various process related design issues including Design for Yield and Manufacturability, multi-Vt strategies. You should also have hands on experience with the following Tool sets Floor planning and PR tools: Cadence Innovus Synopsys ICC2 Synthesis Tools: Synopsys DC/FC Formal Verification : Synopsys Formality and Cadence LEC Static Timing verification: Primetime-DMSA Power Integrity : Apache Redhawk Physical Design Verification Synopsys ICV, Mentor Calibre Scripting: TCL, Perl is required; Python is a plus Role: ASIC / RTL / Logic Design Engineer Industry Type: IT Services & Consulting Department: Engineering - Hardware & Networks Employment Type: Full Time, Permanent Role Category: Hardware Education UG: Any Graduate PG: Any Postgraduate