465 Ddr Jobs - Page 15

Project description This is a great opportunity to work as a part of highly regarded team to deliver leading edge solutions. Responsibilities Drive the development of cutting-edge memory-related firmware projects, contributing to the creation of innovative solutions Collaborate with a highly regarded team to bring innovation to memory-related firmware, ensuring solutions are at the forefront of industry advancements Tackle complex challenges by employing strong problem-solving skills, enhancing firmware to meet evolving performance and reliability standards SkillsMust have 7-10 years' experience. Strong with C language programming Working knowledge of git/gerrit Good understanding of DDR4, D...

We are looking for Senior SOC Verification Engineers for the Hyderabad location. 1) SOC Verification 2) SV UVM 3) DDR, PCIe, Ethernet. Interested candidates, Kindly Share with me your updated profile with Naveen.a@modernchipsolutions.com

Strong in digital design. Skills in ASIC/FPGA verification(directed test or SV/UVM) A good knowledge of simulation flow. Good scripting knowledge Perl/python Share your Resume to mansoor@hisoltech.com

Hi all, We are hiring for the role ASIC Engineer HSIO Post-Silicon Electrical Validation Experience: 3 - 5 Years Location: Hyderabad Notice Period: Immediate - 15 Days Skills: We are seeking a skilled ASIC Engineer to join our High-Speed I/O (HSIO) Post-Silicon Electrical Validation team. The ideal candidate will possess hands-on experience with high-end lab equipment, proficiency in automation scripting, and a solid understanding of high-speed interfaces. This role involves validating and characterizing ASICs post-fabrication to ensure they meet performance, power, and reliability specifications Key Responsibilities Develop and execute detailed post-silicon validation plans for new ASICs. D...

Preparation of CMA, Ratio analysis study and understanding of credit appraisal note. Attending queries from Banks, Rating agency, ASM, Stock auditors, Internal Auditors & Stat Auditors etc. Understanding loan processing process (Working Capital- EPC, LC and Term Loan) and related technical requirement of Banks, Loan documentation and security perfection & satisfaction. Banking compliance (Stock statement, FFR/QMS, UFC etc.) Coordination with Banks for other operational issue. Clearance of EDPMS & IDPM related issues with Bank. Understanding of RBI & FEMA guideline and experience in foreign currency dealing SAP Functioning Interpretation of Financial Statement and analysis thereof MIS related...

Key Responsibilities : Lead and manage RTL design activities for complex ASICs, ensuring high performance and low power consumption. Integrating RTL components into System-on-Chip (SoC) designs Integrating RTL components into System-on-Chip (SoC) designs Architect and implement RTL for digital circuits (such as processors, communication systems, or custom IP cores). Mentor and guide junior RTL engineers in best practices for design, coding standards, and optimization techniques. Develop and refine RTL code in Verilog/SystemVerilog for ASIC development. Collaborate with cross-functional teams (Verification, Physical Design, and Software) to ensure successful integration of the ASIC design. Pe...

About the Role This leadership position is pivotal within a global digital data business, contributing to the development of next-generation connectors, cable assemblies, and radio system components. Youll steer a specialized engineering team focused on Signal Integrity, guiding end-to-end product lifecycle activitiesfrom concept to high-volume manufacturing qualificationthrough rigorous design, simulation, and testing. This is more than managementit's strategic direction in a fast-evolving tech space where innovation and precision meet performance. Click to Apply - (https://forms.gle/fqb29wUvjNuV82C57) Responsibilities Strategic Leadership: Lead a globally distributed team of experienced SI...

Role & responsibilities Test bench development and debug UVM/C based test case development and debug. Power aware test case development and debug External/Internal VIP based test development and debug. Mixed-signal block modelling and RNM based testing. Coverage analysis (code, functional, assertion) Verification plan reviews, Verification reviews Back-annotated netlist simulation execution and debug Debug failing cases & Coverage improvements.

Looking for PCB layout design Engineers with the following requirements: Hands-on experience in complex, high-density, high-speed PCBs, Analog, Digital, RF, mixed-signal PCB layout design. Hands-on experience with High-speed interfaces like DDR3,DDR4, LPDDR, , PROCESSORS, FPGA, PCIE, USB, SATA, MIL-1553, ADC, DAC, ETHERNET, NAND & NOR FLASH, SD, RS-422, BLUETOOTH 4.0, WIFI, GPS, GSM etc. Hands on Complex layout HDI designs with multiple BGAs and Multiple Fine pitch BGA (0.8mm and 0.5mm) of high pin count (2084 pins). Library creation as per IPC 7351 standard. Electrical Constrains setup for high-speed modules to match its requirement (Length match, impedance, delay tuning requirements) Exper...

Must have experience in working with MNC clients Must be good at Honouring Committed Schedules, Quality delivery, Clarity in Communication Familiarity with Serdes components like serializer or de-serializer circuits Strong fundamentals and knowledge of AMS design flow Must have familiarity with layout issues, working with layout team to fix them Must be good at preparing the Review PPT, run through the review meeting and closing all action items Must ensure the design meets PPA goals Good at debugging to ensure meeting all performance simulation issues Must be able to pass QA checks as demanded by the client Must be able to generate all relevant design views using sign-off tools Qualificatio...

Responsibilities Understand the standards/specifications Architecture development and documenting implementation level details Hands on work for every aspect of verification cycle Responsible for the compliance with the latest Methodologies. Developing Verification IPs Define Functional Coverage matrix and Comprehensive Test plan Regression management and functional coverage closure DUT integration and verification for IP delivery sign-off Leading small team Person Specification Required Skills Hands-on experience of complete verification cycle with strong verification concepts Strong knowledge of Verilog, SystemVerilog and UVM Experience in UVM based Verification IP development Experience i...

Looking for PCB layout design Engineer with the following requirements: Hands-on experience in complex, high-density, high-speed PCBs, Analog, Digital, RF, mixed-signal PCB layout design. Exposure with complex 2U, 3U server form factor-based PCB designs. Hands-on experience with High-speed interfaces like DDR3,DDR4/5, LPDDR, , PROCESSORS, FPGA, PCIE, USB, SATA, MIL-1553, ADC, DAC, ETHERNET, NAND & NOR FLASH, SD, RS-422, BLUETOOTH 4.0, WIFI, GPS, GSM etc. Hands on Complex layout HDI designs with multiple BGAs and Multiple Fine pitch BGA (0.8mm and 0.5mm) of high pin count (2084 pins). Library creation as per IPC 7351 standard. Electrical Constraints setup for high-speed modules to match its r...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded Underpinning our mission is the AMD culture We push the limits of innovation to solve the worlds most important challenges We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives AMD together we advance_ Lead SOC Verification Engineer The Role You have a passion for modern, complex processor architectu...

Min 10 yrs of R&D experience in FPGA development (Altera, Xilinx) Experience of RTL languages - VHDL or Verilog Xilinx FPGA Tools Design Flow - Vivado, Chipscope, Quartus. EDA Functional Simulation tools – Synopsys or Mentor or Cadence.

5+ exp in verification at IP/sub-system level. Well versed in (Digital design, SV, UVM). Experience in DDR, PHY protocols. Responsibilities: Develop and execute comprehensive verification plans and testbenches. Write high-quality, efficient, and reusable verification components. Create and maintain detailed verification documentation. Debug complex verification issues and propose solutions. Collaborate with design engineers to ensure design quality and performance. Stay up-to-date with the latest verification methodologies and tools.

Key responsibilities: Experienced in all the phases of Hardware Development Life Cycle including requirements analysis, component selection, design, development, testing, and documentation. Vendor coordination for component selection, PCB Fab, and Assembly house. Involved in supporting proto build, pilot build, and mass production. Co-ordinating with Software/firmware team for the board bring-up and successful system integration. Should be capable of preparing the proposal based on customer requirements Should be capable of executing the project from requirement gathering to final product/service deliverables Should be capable of managing 3 to 4 sub-ordinates Responsible for team collaborati...

Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based onImplementation means trying, testing, and improving outcomes until a final solution emerges . Knowledge means exchange discussions with colleagues from all over the world. Join our team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation. We make rea...

Job Role Overview: The ideal candidate for this role will be an innovative self-starter. You will be a DDR/LPDDR expert with experience in making architectural trade-offs to optimize DDR/LPDDR performance & power for a variety of use cases. You will collaborate with internal and external development engineers (architecture, hardware, validation, software services). You will be a member of a team analysing the product-level system power & performance for DDR/LPDDR. You will contribute to development, support device characterization, and benchmarking efforts. Job Description : Extensive experience in DDR/LPDDR systems Experience in development, preferably for DDR/LPDDR memory controller. In-de...

Reporting to: Lead Engineer. Job Description. Create Schematics using Computer-Aided Design Altium/ Eagle platform tools.. Create PCB Circuit layouts and documentation from schematics using Altium/ Eagle tools considering Layer Stack up, Multilayer Board, EMI/EMC checks, High Speed Design etc.. Designed up to 8 layers. Worked in Mixed signal, powerboard, RF boards of placement and routing with guidelines.. Important High-Speed Interfaces: Processor, DDR3, USB3, MIPI CSI-DSI, EMMC, SDIO and wireless interface antenna Layout Design. Worked on protecting high frequency signals and clock signals from interfacing and noise by providing ground guarding. Knowledge on Layer Stack-up for Impedance co...

As a Hardware Engineer, you will play a key role in the design, debugging, and validation of cutting-edge hardware solutions for Nokias Optical Networking products. Your work will directly contribute to the development of high-performance systems that power global communications infrastructure. In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running.The Network Infrastructuregroup is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise Join Optical Networks division, where innovati...

"We're Hiring For Lead Hardware Engineer role at Chennai Location" Position: Lead Hardware Engineer Experience: 15+ Years Location: Chennai Key Responsibilities: Independently lead electrical hardware design tasks for automotive systems. Review and analyze customer specifications and translate them into design requirements. Design and develop automotive electronics including: Microcontrollers, SoCs, high-speed memory interfaces LVDS and FPD-Link III circuitry High-speed digital and analog circuits Audio, camera, and video signal processing Linear and switching power supplies Perform worst-case analysis and circuit simulations to ensure compliance with specifications. Conduct and support form...

"We're Hiring For Lead Hardware Engineer role at Chennai Location" Position: Lead Hardware Engineer Experience: 5+ Years Location: Chennai Key Responsibilities: Independently lead electrical hardware design tasks for automotive systems. Review and analyze customer specifications and translate them into design requirements. Design and develop automotive electronics including: Microcontrollers, SoCs, high-speed memory interfaces LVDS and FPD-Link III circuitry High-speed digital and analog circuits Audio, camera, and video signal processing Linear and switching power supplies Perform worst-case analysis and circuit simulations to ensure compliance with specifications. Conduct and support forma...

Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various functionalities, architecture, layout and implementation for a client 1. ASIC RTL Engineer : RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One scripting languages like Make flow, Perl ,shell, python - Any One LocationBangalore / Hyderabad / Kochi Experience - 7+ - Lead/Architect 3. Team Management a. Resourcing i. Forecast talent requirements as per the current and future business needs ii. Hire adequate and right resources f...

Long Description 1. ASIC RTL Engineer : RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One scripting languages like Make flow, Perl ,shell, python - Any One LocationBangalore / Hyderabad / Kochi Experience - 7+ - Lead/Architect 2. Emulation Lead JD - Emulation Lead (Zebu/ HAPS /Veloce/Palladium and Module Build (End to End) Location - Bangalore / Hyderabad Experience - 7+ - Lead/Architect 3. Lead Design Verification Engineer : 7+ years of hands-on DV experience in SystemVerilog/UVM. Must be able to own and drive the verification of a block / s...

Roles and Responsibilities Design verification using UVM (Universal Verification Methodology) for IP/SoC level verification. Develop test benches from scratch, including creating drivers, monitors, and predictors. Utilize System Verilog to write verification code and debug issues. Collaborate with cross-functional teams to identify requirements and develop test plans. Participate in peer reviews to ensure high-quality deliverables. Desired Candidate Profile 4-10 years of experience in SOC/IP Verification with expertise in DV on Cpu, DDR, Ethernet, PCIe protocols. Bachelor's degree (B.Tech/B.E.). Master's degree preferred but not mandatory (M.Tech). Strong understanding of GLS (Global Logic S...