Jobs

Interviews
Job Alerts
Tools

Upskill and Grow with AI

Mock Interview Practice interviews in realistic simulations

Coding Practice Improve your coding skills with challenges

Certification Earn certifications to validate your skills

AI Learning Get trained with AI expert sessions

Career Path AI insights for smarter career decisions

AI Job Match Score AI-Powered Job Match Against Your Resume and Optimize Your Resume

Career Tools and Resources

Resume Builder Build Professional Resume with Ease

ATS Friendliness Check Check Resume Friendliness for Applicant Tracking Systems

Auto Apply Apply to hundreds of jobs on any platform effortlessly

Co-Pilot (Chrome Extension) Your AI Assistant for Seamless Browsing Efficiency

Interview Questions Streamline interviews with ready-to-use questions

Salaries Discover market-driven salary insights across skillsets and geographies

Companies Explore leading companies actively hiring talent
For Employers

Jobs

Interviews

Home
>
Jobs in Bengaluru
>
Cisco
>
ASIC Design Verification Engineer - SystemVerilog, UVM test bench

ASIC Design Verification Engineer - SystemVerilog, UVM test bench

Cisco

6 - 11 years

8 - 13 Lacs

Bengaluru

Posted:2 months ago| Platform:

Apply

Skills Required

ASIC Design Verification SystemVerilog DVE C++ Verdi VCS Shell scripting Python scripting Perl TCL

Work Mode

Work from Office

Job Type

Full Time

Job Description

Your Impact Develop test plans, cover points, and qualification tests Perform end-to-end verification of design blocks and top-level Build and maintain block, cluster, and top-level DV environment infrastructure Construct testbenches components like scoreboard, agents, sequencers, and monitors Write tests, debug regressions, and drive to module verification closure Collaborate with designers and verification engineers for cross-block verification Upgrade configuration/reset sequences (APIs) Develop environment and tests for emulation Ensure complete verification coverage through code, functional coverage, and gate level simulations Support post-silicon bring-up and optimize integration and performance Minimum Qualifications Bachelors Degree in EE, CE, or other related fields with 6+ years or Masters Degree with 4+ years of ASIC design or verification experience Experience in developing verification environment for complex blocks from design specifications document Proficient in verifying complex blocks and/or clusters for ASIC using UVM/System Verilog. Scripting experience with Perl, Python, TCL, shell scripts. Preferred Qualifications Experience in Data center/ Hyper scaler /AI Networking technologies Proven experience meeting and delivering project milestones and deadlines. Ability to communicate technical concepts to audiences spanning executives to junior engineers to customers. Demonstrated ability in troubleshooting and debugging. Experience with Emulation and Formal Verification tools is a plus.

More Jobs at Cisco

Commercial Solutions Engineer - Cyber Security , Networking

Mumbai

10 - 15 yrs

INR 10 - 11 Lacs

Business Development Manager

Bengaluru

5 - 10 yrs

INR 8 - 13 Lacs

Electrical Product Engineer

Bengaluru

4 - 9 yrs

INR 15 - 17 Lacs

Test Automation Engineer

Bengaluru

1 - 3 yrs

INR 8 - 9 Lacs

ASIC Engineer | 5+ years | (Floor planning , Place and route , Formal verification , Timing closure , Perl / Python / Scripting )

Ahmedabad, Gujarat, India

Experience: Not specified

Salary: Not disclosed

Mock Interview

Practice Video Interview with JobPe AI

Start Job-Specific Interview

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.

Job Application AI Bot

Apply to 20+ Portals in one click

Download Now

Download the Mobile App

Instantly access job listings, apply easily, and track applications.

Enhance Your Skills

Practice coding challenges to boost your skills

Start Practicing Now

Cisco

Software Development

San Jose CA

Login to

Please Verify Your Phone or Email

Confirm Action

Search

Profile

Upskill and Grow with AI

ASIC Design Verification Engineer - SystemVerilog, UVM test bench