ASIC Design Verification Engineer

As a Verification Engineer at Google, you will play a crucial role in the development of custom silicon solutions that drive the future of Google's direct-to-consumer products. Your contributions will be instrumental in the innovation process behind products that are cherished by millions globally. Your expertise will be pivotal in shaping the upcoming generation of hardware experiences, ensuring exceptional performance, efficiency, and integration. Your primary responsibility will involve planning and executing the verification of the next generation configurable Infrastructure Internet Protocols (IPs), interconnects, and memory subsystems. You will be tasked with creating and refining constrained-random verification environments using SystemVerilog, as well as developing cross-language tools and scalable verification methodologies. In this role, you will be expected to identify and implement various coverage measures for stimulus and corner-cases, ensuring comprehensive testing coverage. Collaborating closely with design engineers, you will debug tests to deliver functionally correct blocks and subsystems, while also closing coverage measures to pinpoint verification gaps and showcase progress towards tape-out. To be successful in this position, you should possess a Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. Additionally, experience in verifying digital reasoning at the Register-Transfer Level (RTL) using SystemVerilog or C/C++, along with familiarity with verification components and environments in standard verification methodology, is essential. Proficiency in coding languages, software development frameworks, and experience with digital systems using standard Internet Protocols (IP) components/interconnects will be advantageous. Preferred qualifications include a Master's degree or PhD in Electrical Engineering or Computer Science, or equivalent practical experience. A background in architecture with a focus on Hierarchies, Coherency, Memory Consistency Models, and experience with verification methodologies spanning simulation, emulation, and Field Programmable Gate Array (FPGA) prototypes will be beneficial. Additionally, experience with performance verification of Systems on a Chip (SOCs), pre-Silicon analysis, post-Silicon correlation, and Interconnect Protocols would be advantageous. Join our dynamic team at Google, where we combine the best of Google AI, Software, and Hardware to create innovative and helpful experiences. We are dedicated to researching, designing, and developing new technologies and hardware to enhance computing speed, seamlessness, and power, ultimately striving to improve people's lives through technology.,