Senior RTL Design Engineer

Eteros Technologies

4 - 6 years

6 - 8 Lacs

kolkata mumbai new delhi hyderabad pune chennai bengaluru

Posted:1 day ago| Platform:

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Skills Required

automation vhdl semiconductor simulation static timing analysis digital design verilog debugging perl python

Work Mode

Work from Office

Job Type

Full Time

Job Description

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Define micro-architecture and write detailed design specifications.
Develop RTL code based on system-level specifications using Verilog, VHDL, or SystemVerilog.
Implement complex digital functions and algorithms in RTL.
Create and execute detailed test plans to verify RTL designs.
Optimize designs for power, performance, and area (PPA) constraints.
Perform simulation and debugging to ensure design correctness.
Work with verification engineers to develop test benches and validate RTL against specifications.
Strong understanding of digital design principles and concepts.
Proficiency in writing and debugging RTL code.
Experience with synthesis, static timing analysis, and linting tools.
Familiarity with scripting languages such as Python, Perl, or TCL for automation.
Experience in any of processor subsystem design, interconnect design, high speed IO interface design.
Requirements
Qualifications:

Bachelor\u2019s or Master\u2019s degree in Electrical Engineering, Computer Engineering, or related field.

4-6 years of experience in RTL design and verification.

Proven experience with digital logic design using Verilog, VHDL, or SystemVerilog.

Experience with simulation tools such as VCS, QuestaSim, or similar.

Hands-on experience with RTL design tools (e.g., Synopsys Design Compiler, Cadence Genus).

Benefits
What\u2019s in it for you:

Work on leading edge technologies

An opportunity for career development and growth

Competitive compensation

Exceptional benefits

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Senior RTL Design Engineer

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4.0 - 6.0 yrs

INR 6 - 8 Lacs

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