Senior R&D Engineer, Memory Design Engineer

You thrive in a collaborative environment and have a proven track record of designing and developing embedded memories such as SP SRAM, DP SRAM, Register File, and ROM

Your expertise in ultra-high-speed, ultra-low-power, or high-density design portfolios sets you apart

You possess excellent analytical and problem-solving skills, with a keen attention to detail

Your ability to work independently and manage your workflow efficiently makes you a valuable asset to any team

You are proficient in programming languages like C-Shell and Perl, with additional knowledge in C++ or JavaScript being a plus

With strong interpersonal communication skills, you excel in both verbal and written English

Your commitment to continuous learning and professional growth drives you to stay updated with the latest advancements in technology, What Youll Be Doing:

Develop CMOS embedded memories such as SP SRAM, DP SRAM, Register File, and ROM, Design architecture and circuit implementation, focusing on ultra-high-speed, ultra-low-power, or high-density design portfolios, Perform schematic entry, circuit simulation, layout planning, layout supervision, design verification, and validation, Interface with CAD and Frontend engineers for memory compiler automation, EDA model generation, and full verification flow, Perform bit cell development and bit cell verification, and drive physical layout design and verification, Provide support and/or perform other duties as assigned and required, The Impact You Will Have:

Contribute to the development of cutting-edge CMOS embedded memory technologies, Drive innovation in ultra-high-speed, ultra-low-power, and high-density design portfolios, Enhance the efficiency and performance of memory design processes through automation and verification, Support the integration of advanced memory technologies into high-performance silicon chips, Collaborate with cross-functional teams to deliver state-of-the-art memory solutions, Play a key role in advancing Synopsys leadership in chip design and verification, What Youll Need:

Bachelors or masters degree in Electrical Engineering, Telecommunication, or related fields, Minimum 5+ years of memory design experience, Proficient with CMOS memory design, circuit simulation, memory layout designs, layout parasitic extraction, and knowledge of layout verification tools and debugging techniques, Programming capability in C-Shell, Perl; knowledge of C++ or JavaScript is a plus, Excellent analytical and problem-solving skills with attention to detail, Who You Are:

Self-motivated, self-directed, detailed oriented, and well-organized, Strong analytical, problem-solving, and negotiation skills, Excellent command of English, both verbal and written, Strong interpersonal communication and teamwork skills, Professionalism, critical/logical thinking, and future goals focused, High commitment to continuous learning and professional development, The Team Youll Be A Part Of:

You will be part of a dynamic and innovative team focused on designing and developing advanced CMOS embedded memory solutions

Our team collaborates closely with CAD and Frontend engineers to drive automation and verification processes, ensuring the highest performance and efficiency in memory design

Together, we push the boundaries of technology, contributing to Synopsys leadership in the semiconductor industry, Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs

Our total rewards include both monetary and non-monetary offerings

Your recruiter will provide more details about the salary range and benefits during the hiring process