Senior engineer-stdcells layout

Micron

0 years

0 Lacs

hyderabad telangana india

Posted:1 month ago| Platform: Foundit logo

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Work Mode

On-site

Job Type

Full Time

Job Description

Our vision is to transform how the world uses information to enrich life for .

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Responsibilities will include, but are not limited to:

Design and maintain standard cells layout for new DRAM products on new technology
Lead the stdcells layout projects from initial spec definition to till PPA qualified library release
Closely collaborate with DTCO team to developstdcellsarchitecture for emerging technologies
Perform layout verification like LVS/DRC/Latchup, quality check and documentation.
Responsible for on-time delivery of block-level layouts with acceptable quality.
Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment.
Guide junior team-members in their execution of Sub block-level layouts & review their work.
Contribute to effective project-management.
Develop new flows/methodologies to reduce the stdcells manual effort & increase the productivity
Closely work with the Process team, CMOS and CAD to negotiate drc for new technology.
Co-work with international colleagues on developing new flows and tools forstdcells layout & design

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