4 Sdram Functionality Jobs

Analog Design, Sr Engineer-10559 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced professional with a deep understanding of VLSI design and a strong background in high-speed protocols Analog Circuit Design - CMOS circuit design and layout methodology & flow. Familiarity with ASIC design flow. Knowledge of JEDEC requirements for DDR interfaces & standards, DDR Timing, ODT and SDRAM functionality would be a plus. What Youll Be Doing: DDR/HBM Memory Interface I/O Circuit and layout design including GPIO and Special IOs. Work with DDR/HBM PHY team, package engineers and system engineers to meet design specifications. What Youll Need: Bachelor&aposs and/or Master&aposs Degree in Electrical Engineering or similar with a focus on VLSI design. Experience Required: 1 - 3 yrs Who You Are: Creative and results-oriented, capable of managing multiple tasks concurrently. Strong verbal and written communication skills in English. Ability to work collaboratively across teams to deliver solutions to customers. Strong analytical, reasoning, and problem-solving skills. Willingness to travel occasionally to support customer engagements. The Team Youll Be A Part Of: The team focuses on enabling our Interface IP customers to integrate the IP into their SoC and assist them through their design flows, debugging critical issues, and supporting silicon bring-up. This collaborative team works closely with customers to ensure the successful deployment of Synopsys' leading Interface IP products in various market segments. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an enthusiastic and detail-oriented engineer passionate about analog and mixed-signal circuit design. With a strong foundation in CMOS technologies and a keen interest in deep submicron process challenges, you thrive in collaborative, fast-paced environments. You enjoy diving deep into technical problems, leveraging your academic background in electronics or electrical engineering to design innovative solutions. You are adept at balancing creativity with precision, ensuring your designs meet rigorous standards for quality, performance, and reliability. You communicate effectively, both in writing and verbally, making it easy for you to share ideas and work closely with cross-functional teams. Your curiosity compels you to stay updated on the latest industry advancements, and youre always eager to learn new methodologies or tools. You value diversity and inclusive teamwork, and you actively contribute to a positive and supportive work culture. With 13 years of practical experience, you are ready to take on new challenges, grow your skills, and make a tangible impact on industry-leading products. What Youll Be Doing: Designing DDR/HBM Memory Interface I/O circuits, including GPIO and special IOs, ensuring robust performance and compliance with stringent standards. Collaborating closely with the DDR/HBM PHY team, package engineers, and system engineers to meet and exceed design specifications and integration requirements. Developing and optimizing circuit layouts, applying advanced CMOS design methodologies and best practices to enhance yield and manufacturability. Conducting simulations, analysis, and verification of analog and mixed-signal circuits to ensure functionality, performance, and reliability. Supporting the ASIC design flow, from concept through tape-out, and assisting in debugging and resolving design issues as they arise. Documenting design processes, decisions, and results, contributing to knowledge sharing and continuous improvement within the team. Engaging in technical discussions and reviews, providing input on design trade-offs and innovative approaches. The Impact You Will Have: Drive the development of high-performance memory interface solutions, directly influencing the capabilities of next-generation semiconductor products. Enhance the efficiency and quality of circuit designs, contributing to faster time-to-market and reduced development costs. Strengthen Synopsys reputation for reliable and innovative analog/mixed-signal IP by delivering robust and manufacturable designs. Facilitate seamless integration and collaboration across multidisciplinary teams, ensuring holistic product success. Support the adoption of new technologies and design methodologies, keeping Synopsys at the forefront of industry trends. Enable customers to achieve superior system performance and energy efficiency through your expert design contributions. Help expand Synopsys portfolio of market-leading memory interface solutions, supporting growth and customer satisfaction. What Youll Need: Solid knowledge of CMOS processes and deep submicron technology challenges. Experience with CMOS circuit design, layout methodology, and flow; understanding of analog/mixed-signal circuits. Familiarity with ASIC design flow and EDA tools. Basic understanding of ESD concepts; knowledge of JEDEC DDR interface requirements, DDR timing, ODT, and SDRAM functionality is a plus. Ability to execute assigned circuit design tasks efficiently, ensuring high product quality. Strong written and verbal communication skills for effective collaboration. Who You Are: Collaborative team player who thrives in a diverse and inclusive environment. Detail-oriented with strong analytical and problem-solving skills. Proactive learner with a passion for innovation and continuous improvement. Adaptable, open to feedback, and resilient in the face of challenges. Effective communicator, able to articulate complex ideas clearly to technical and non-technical stakeholders. The Team Youll Be A Part Of: Youll join a dynamic, multidisciplinary group of engineers focused on developing cutting-edge memory interface solutions for the worlds leading semiconductor companies. The team values creativity, technical excellence, and open collaboration. By working together, youll contribute to delivering high-impact analog and mixed-signal IP that powers advanced computing, AI, and connectivity applications. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

The role at Synopsys revolves around being at the forefront of cutting-edge innovations that are reshaping the way businesses operate and individuals engage in leisure activities. Whether it's self-driving vehicles, Artificial Intelligence, the cloud, 5G, or the Internet of Things, these advancements are heralding the Era of Smart Everything. Synopsys is driving this transformation with the most sophisticated technologies for chip design and software security. If you are driven by the same enthusiasm for pioneering solutions, we are eager to connect with you. Within our Silicon IP division, our focus lies in enhancing System on Chip (SoC) integration at a rapid pace. We possess the largest array of silicon IP globally, comprising pre-designed logic blocks, memory components, interfaces, analog features, security modules, and embedded processors. Our goal is to assist clients in incorporating more functionalities into their products, meeting specific performance, power, and size criteria for their intended applications, and expediting the launch of distinctive products to market with minimized risks. We are currently seeking forward-thinking professionals to lead the development of our upcoming generation of DDR/HBM/UCIe PHY IPs. Responsibilities: - Serve as a Senior Supervisor to spearhead the progress of the next generation of DDR/HBM/UCIe IP - Exhibit leadership attributes by driving the development of new technologies, showcasing adept analytical and problem-solving skills - Offer guidance to team members to adhere to schedules and address challenges effectively - Play a pivotal role in project management and contribute to the intricate facets of a project - Create and uphold schedules, collaborate across diverse teams, and exhibit proficiency in design and verification processes Requirements: - Qualification: BTech/MTech - Skills/Experience: 8+ years - Proficiency in CMOS processes and challenges in deep submicron process technologies - Sound understanding of CMOS circuit design and layout methodology, comprehensive knowledge of analog/mixed-signal circuitry, and familiarity with basic ESD principles is advantageous - Well-versed in analog mixed-signal simulation strategies, with a solid grasp of Signal Integrity and/or Power Integrity being beneficial - Acquainted with ASIC design flow - Familiarity with JEDEC requirements for DDR interfaces and standards, DDR Timing, ODT, and SDRAM functionality would be advantageous - Capable of leading projects to deliver top-notch product quality and operational efficiency - Excellent written and verbal communication skills to effectively engage with development teams,

The role at Synopsys is at the core of groundbreaking innovations that shape the future of technology in various industries. From self-driving cars to Artificial Intelligence, the cloud, 5G, and the Internet of Things, these advancements mark the Era of Smart Everything. Synopsys drives this revolution with cutting-edge technologies in chip design and software security, fostering a culture of innovation that welcomes individuals who share the same passion. In the Silicon IP business, the focus lies on enhancing System-on-Chip (SoC) capabilities swiftly. Synopsys boasts the most comprehensive portfolio of silicon IP, comprising predesigned logic blocks, memory, interfaces, analog, security, and embedded processors. This diverse range aids customers in integrating more features, meeting specific performance, power, and size criteria for their applications, and expediting product launches with reduced risks. Currently, Synopsys is seeking forward-thinking leaders for the development of next-generation DDR/HBM/UCIe PHY IPs. The responsibilities associated with this role include supervising the development of these IPs, showcasing leadership qualities, fostering new technology advancements, offering guidance to employees, leading projects, managing schedules, working collaboratively across functions, and demonstrating proficiency in design and verification. Requirements for this position include a BTech/MTech qualification, a minimum of 8 years of relevant experience, knowledge of CMOS processes and challenges in deep submicron process technologies, familiarity with CMOS circuit design and layout methodology, a deep understanding of analog/mixed-signal circuitry, awareness of basic ESD concepts, experience with analog mixed-signal simulation strategies, knowledge of Signal Integrity and/or Power Integrity, familiarity with ASIC design flow, understanding of JEDEC requirements for DDR interfaces and standards, proficiency in DDR Timing, ODT, and SDRAM functionality, ability to lead projects ensuring top product quality and efficiency, and excellent written and verbal communication skills to effectively lead development teams.,