10 Rtl Integration Jobs

As a Senior Member of Technical Staff Silicon Design Engineer at AMD, you will play a crucial role in bringing cutting-edge designs to life within the Radeon Technologies Group. Working closely with various teams, you will be instrumental in achieving first pass silicon success and contributing to the advancement of next-generation computing experiences. - Translate high level SoC architecture to microarchitecture details to facilitate SoC implementation and verification - Demonstrate expertise in SoC Chip Pervasive Logic including Clock, Reset, and Power microarchitecture and design - Showcase proficiency in SoC Low Power Design by managing voltage and clock domain crossings, Power Gating a...

Role Overview: You will be part of the Client Development Group (CDG) as a Design for Test engineer, responsible for developing logic design, RTL coding, simulation, DFT timing closure support, test content generation, and delivery to manufacturing for various DFx content. Your role will involve participating in the definition of architecture and microarchitecture features of the block, subsystem, and SoC under DFT being designed. You will apply various strategies, tools, and methods to write and generate RTL and structural code to integrate DFT. Additionally, you will optimize logic to qualify the design for power, performance, area, timing, and design integrity for physical implementation....

As a Frontend Principal Engineer specializing in Semiconductor Chip Design, your role involves leading and coordinating the execution of the front-end stages of integrated circuit development. You must possess a strong technical background in digital design, verification, and project management skills. Your responsibilities include overseeing product support activities for both the Pre-production and Post-production stages to ensure successful initiation, development, and sustainment of semiconductor designs. Key Responsibilities: - Minimum 8+ years of experience in System Architecture for ARM-based MCU product development - Minimum 8+ years of experience in RTL Design, Coding, and RTL Integ...

You should have 5 to 14 years of work experience in VLSI RTL IP or Subsystem design. Your main responsibilities will include designing and developing CXL and DRAM controller (DDR4/5) based intellectual property, engaging with other architects within the IP level to drive the Micro-Architectural definition, delivering quality micro-architectural level documentation, producing quality RTL on schedule by meeting PPA goals, being responsible for the logic design/RTL coding [in Verilog and/or System Verilog], RTL integration, and timing closure of blocks. You will collaborate with the verification team to ensure implementation meets architectural intent, run quality checks such as Lint, CDC, and ...

As a Frontend Principal Engineer specializing in Semiconductor Chip Design, you will lead and coordinate the execution of the front-end stages of integrated circuit development. This role requires a strong technical background in digital design, verification, and project management skills. Additionally, you will oversee product support activities for both the Pre-production and Post-production stages, ensuring the successful initiation, development, and sustainment of semiconductor designs. You should have a minimum of 8+ years of experience in System Architecture for ARM based MCU product development, along with a minimum of 8+ years of experience in RTL Design, Coding, and RTL Integration....

NVIDIA, a company known for continuously reinventing itself, has played a pivotal role in reshaping the PC gaming market, modern computer graphics, and parallel computing with the invention of the GPU. The realm of artificial intelligence is currently experiencing significant growth globally, necessitating highly scalable and massively parallel computation capabilities where NVIDIA GPUs excel. NVIDIA's commitment lies in addressing challenging problems that have a profound impact on the world, ultimately aiming to enhance human creativity and intelligence. As part of the NVIDIA team, you will find yourself in a diverse and supportive environment that fosters inspiration and excellence, encou...

You will be responsible for driving DFT implementation in Wireless SoC chips. You will have full ownership of ATPG architecture, design, implementation, verification, and deployment to Silicon testing, collaborating with Test engineers. Your duties will also involve MBIST design, implementation, and verification for all memories in the SoC. You should be capable of generating and debugging DFT patterns on the tester. You will work closely with the design, design-verification, and backend teams to facilitate the integration and validation of the test logic in all phases of the design and backend implementation flow. To excel in this role, you are required to have 8-10 years of experience and ...

As a senior leader in the central physical design team at Marvell, you will shape the long-term vision for physical design capabilities and infrastructure in alignment with the company-wide technology strategy. You will lead RTL-to-GDSII implementation for multiple SoC programs, overseeing synthesis, floorplanning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, and physical verification (DRC/LVS). Your role will involve providing strategic leadership and technical direction to physical design teams, ensuring successful and timely tapeouts of complex, high-performance SoCs. Mentoring and developing engineering talent will be a key asp...

Good understanding of the ASIC flow and digital concepts RTL Designing knowledge with Verilog or System Verilog. Hands on experience in RTL integration Good knowledge and exposure to defining HW interfaces. Worked on Lint, CDC and RDC Good exposure on the RTL integration Strong programming suits various languages such as Verilog, C/C++, Python, Perl with a knack for problem-solving abilities. Experience working with ARM/RISC V processors Excellent written and verbal communication skills Fundamental understanding of Bus or Pin Planning, Block or Chip Level Floor planning, Clock Tree Synthesis, Static Timing Analysis, Knowledge on USB 3.1 or DDR protocol is plus Good knowledge on the verificat...

We are looking for experienced RTL Integration Engineers to join our team and contribute to cutting-edge semiconductor designs. If you have a passion for SoC integration and front-end design methodologies, we want to hear from you! Key Responsibilities: Deliver RTL Subsystems and/or top-level SoC RTL across multiple projects Expertise in RTL database management, partitioning, and third-party IP integration Work with lint, DFT, UPF, synthesis, timing, and power analysis Address SoC integration challenges at both subsystem and full-chip levels Integrate Digital IPs such as PCIe, SDIO, USB, and ARM processors with protocol expertise Design top-level clock/reset circuits and manage memory select...