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RTL DESIGN ENGINEER

Wafer Space - An ACL Digital Company

2 - 10 years

0 Lacs

Bengaluru Karnataka India

Posted:5 days ago| Platform:

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Skills Required

design flow integration ip synthesis emulation verification architecture mobile layout timing analysis dft vhdl verilog coding perl tcl scripting

Work Mode

On-site

Job Type

Full Time

Job Description

Wafer Space is looking for some expert RTL Front End Design Engineers, having good knowledge of ASIC design flow. This will be a very challenging and exciting role and will involve very complex designs.Job Responsibilities-Chip integration of high complexity SOCs.Coordinating with various IP owners on receivables and DV, synthesis and Emulation for deliverablesSpyglass/CDC for the full chip and will evaluate the incoming bugs and take appropriate actionFormal Verification between RTL to Netlist and Netlist to NetlistManual and Conformal ECORunning Lint (Spyglass) at SoC level.Chip level integration and connectivity.Debugging FV failuresECO implementation.

Desired Skills And Experience-

2 - 10 years of experienceSound knowledge in Micro Architecture design and RTL implementatioUnderstanding of ARM SoCs with AXI/AHB buses, peripherals, CPUs and mobile SOCs is desirableExperience in Synthesis and pre-layout timing analysisUnderstanding of DFT flow is desirableExperiencing using clear case a mustExperienced with VHDL/Verilog/coding and tools like VCS/Verdi/Spyglass/Mentor Zero-inProficiency in LEC and formal flows.Experience in Perl, TCL and shell scriptingExcellent interpersonal & analytical skills with ability to work independently

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Wafer Space - An ACL Digital Company

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RTL DESIGN ENGINEER