MTS Silicon Design Engineer Advanced Micro Devices, Inc

6.0 - 10.0 years

8 - 12 Lacs

bengaluru

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MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to microarchitect , design and deliver data fabric IP RTL . These include new and existing features and components for AMD s data fabric IP , working in close coordination with verification to ensure design quality. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/ timezones . You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Digital design im...

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Senior Principal Design Engineer Marvell Technology

15.0 - 20.0 years

45 - 50 Lacs

pune, bengaluru

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About Marvell . Your Team, Your Impact Marvell Compute and Custom Solutions has been at the forefront of developing and delivering leading edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast-growing product lines, Marvell technology is powering the next-generation data processing and workload acceleration platforms for the Carrier, Cloud/Enterprise and Datacenter market segments. The proliferation of the data economy is accelerating and creating significant strains on the global data infrastructure. Built on decades of expertise and execution, Marvell s custom ASIC solution offers a differentiated approach wi...

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PCIe/CXL Design Tech Lead Altera

7.0 - 12.0 years

9 - 13 Lacs

bengaluru

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Part of the global PCIe/CXL Center of Excellent (CoE) team, developing the latest & state of the art PCIe/CXL solution for next generation FPGA in the latest process technology node. Develops logic/RTL design and simulation for IP/SoC design & integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design. Participates in the definition of PCIe/CXL architecture and microarchitecture features of the block being designed. Works with IP providers to integrate and validate IPs at the SoC level. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design in...

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Staff Design Engineer Evnek

10.0 - 15.0 years

6 - 9 Lacs

bengaluru

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Job Role: Staff DesignEngineer Experience: 10+yrs Location: Bengaluru Notice Period: 30days max Role Summary We are seeking an experienced Design Engineer to join our team andcontribute to the RTL design and development of the signal processingpath for Aevaadvanced 4-D Lidar processing chip. In this role, you willdesign, implement, and integrate key sub-components into both ASIC and FPGAplatforms, ensuring performance, efficiency, and robustness. Key Responsibilities Design and develop custom components for the digital signal processing pipeline, including filters, FFTs, control logic, and related modules. Create micro-architecture specifications, write SystemVerilog RTL code, and perform te...

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