Principal Engineer - Post Si Validation

General Summary:

Silicon Validation Lead

leadership role

Minimum Qualifications:

• Bachelor's degree

  in Computer Science, Electrical/Electronics Engineering, or a related field and

  8+ years

  of hardware engineering experience
• OR

• Master's degree

  and

  7+ years

  of experience
• OR

• PhD

  and

  6+ years

  of experience

• 14+ years of total industry experience

  in

  silicon validation, bring-up, and GPU technology

Required Skills & Experience:

• Proven expertise in

  GPU architecture

  , feature validation, and silicon bring-up
• Strong understanding of

  microprocessor architecture

  and

  power management subsystems

• Deep experience in

  debugging silicon issues

  related to performance, functionality, power, and physical design
• Solid experience with:

• Test content development

  for silicon feature validation
• Writing test vectors for

  tester bring-up

• Developing test plans based on use-case and architecture coverage
• Proficient in

  assembly, C, and Python

• Skilled in

  scripting languages

  (Perl, TCL, Shell scripts)
• Hands-on with

  Linux/Unix development environments

• Familiarity with hardware debug tools including:

• JTAG

  ,

  Kratos

  ,

  Logic Analyzers (LAs)

  ,

  Emulation platforms

  ,

  DMMs

  , etc.

Preferred Experience:

• Experience in

  performance and power characterization

  of GPUs
• Prior involvement in

  FPGA/emulation-based pre-silicon validation

• Collaboration with software, SoC, and verification teams in silicon lifecycle
• Background in defining or enhancing

  debug architecture

  for future GPU cores
• Strong cross-functional coordination and stakeholder communication

Roles & Responsibilities:

Silicon Validation Lead

• Drive

  GPU feature bring-up

  , validation, and debug on Qualcomm silicon
• Work with architecture, design, and verification teams to develop and execute silicon test plans
• Plan and implement

  power, performance, and functional validation

  strategies
• Prepare for silicon validation through emulation and FPGA environments
• Triage failures and

  debug post-silicon issues

  , including reproduction in pre-silicon environments
• Architect

  debug enhancements

  for future GPU silicon
• Define and lead

  test automation strategies

  to improve coverage and efficiency
• Provide technical leadership to junior engineers and validation teams