16 Postsilicon Validation Jobs

As a Manager, DFT, you will be responsible for implementing the hardware Memory BIST (MBIST) features that support ATE, in-system test, debug, and diagnostics needs of the memories in design. You will work closely with the design, design-verification, and backend teams to enable the integration and validation of the test logic in all phases of the design and backend implementation flow. The job requires you to have good scripting skills and the ability to design and debug with minimal oversight. Additionally, you will be involved in high-quality pattern release to the test team and support silicon bring-up and yield improvement. Key Responsibilities: - Implement hardware Memory BIST (MBIST) ...

As a Senior Technical Leader - RTOS SDK & Post-Silicon Validation at MIPS, your role will involve leading technical initiatives related to Real-Time Operating System (RTOS) Software Development Kit (SDK) and post-silicon validation. Your responsibilities will include overseeing the development of RTOS SDK, designing and executing post-silicon validation tests, and ensuring product quality. Key Responsibilities: - Lead technical initiatives related to Real-Time Operating System (RTOS) Software Development Kit (SDK) and post-silicon validation - Oversee the development of RTOS SDK - Design and execute post-silicon validation tests - Ensure product quality Qualifications: - Experience in Real-T...

As a Senior Contract NAND Engineer at a leading IT company in Bangalore, your role will involve defining System Design, FW Architecture, and test flows for NAND Flash memory products. Your responsibilities will include: - Understanding memory specifications and creating system designs for memory products - Developing internal and external specifications in collaboration with system architects, external vendors, and cross-functional teams - Defining, implementing, and executing NAND tests and Bench Validation for NAND Flash-based products - Constantly learning and exploring new technologies while effectively solving problems - Collaborating with cross-functional teams like ASIC, Firmware, and...

Role Overview: As a member of the Common Hardware Group (CHG) at Cisco, you will be part of a team that delivers cutting-edge silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. Your work will involve designing networking hardware for Enterprises, Service Providers, Public Sector, and Non-Profit Organizations worldwide. Join the team in shaping Cisco's groundbreaking solutions by participating in the design, development, and testing of advanced ASICs that are at the forefront of the industry. Key Responsibilities: - Implement Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics requirements of the des...

Role Overview: As a Senior Post-Silicon Validation (PSV) Engineer / Lead, you will be responsible for the post-silicon bench validation of Analog Mixed Signal (CCC) IPs / SoCs. This includes executing validation across Process, Voltage, and Temperature (PVT) corners, as well as performing system-level validation using lab instruments such as oscilloscopes and logic analyzers. Your role will involve validating PCIE interface functionality and performance, along with debugging and resolving silicon-level issues by collaborating with cross-functional teams including design, verification, and test. Key Responsibilities: - Execute validation across Process, Voltage, and Temperature (PVT) corners ...

As a Senior DFT Engineer at Samsung Semiconductor India Research (SSIR), you will play a crucial role in full chip DFT architecture, implementation, timing closure, and post-silicon validation. Your responsibilities will include: - Planning scan architecture and optimization for pattern volume - Performing pin mixing and scan compression planning - Implementing power optimization techniques in test modes - Planning MBIST architecture and insertion - Verifying analog and mixed signal IP testing architecture You will also be responsible for tasks such as timing closure of scan and MBIST, writing SDCs, debugging timing issues, and interpreting tester results. Additionally, you will need to unde...

As a PHY Hardening Engineer at Ampere, you will have a crucial role in developing cutting-edge expertise in high-speed digital design. You will collaborate with various teams, including architects, RTL designers, packaging and PCB design teams, and post-silicon validation groups. Your tasks will involve optimizing layouts, ensuring signal and power integrity, and performing chip-level physical design tasks. Your expertise in managing high-speed signals and advanced packaging techniques will be vital in delivering reliable designs meeting timing, power, and manufacturability requirements. Key Responsibilities: - Collaborate with cross-functional teams to optimize layouts and ensure signal and...

The Manager, DFT will be responsible for implementing the hardware Memory BIST (MBIST) features that support ATE, in-system test, debug, and diagnostics needs of the memories in design. You will work closely with the design, design-verification, and backend teams to enable the integration and validation of the test logic in all phases of the design and backend implementation flow. The job requires you to have good scripting skills and the ability to design and debug with minimal oversight. You will also be involved in high-quality pattern release to the test team and support silicon bring-up and yield improvement. The ideal candidate for this role should be an ASIC Design DFT engineer with 1...

You will be joining MIPS, a leading provider of configurable and efficient compute solutions for the automotive, cloud, and embedded markets. With a strong emphasis on accelerating compute density, MIPS" industry-leading cores offer advanced scalability and efficient data processing capabilities. With a rich history spanning over two decades and billions of MIPS-based chips shipped, the company stands at the forefront of innovation in the compute industry. As a Senior Technical Leader - RTOS SDK & Post-Silicon Validation at MIPS in Pune, your primary responsibility will be to spearhead technical initiatives concerning Real-Time Operating System (RTOS) Software Development Kit (SDK) and post-...

Pre-Silicon and Post-Silicon Validation Engineer TME Features Notice Period : Immediate Joiner Mode : Onsite work This Job highlights the engineer's responsibilities in both pre-silicon and post-silicon validation, particularly focusing on TME features and secure boot processes. Required Skills: Pre-Silicon Validation: Experience in validating features before silicon production Post-Silicon Validation: Skills in validating features after silicon is manufactured TME (Test Measurement Equipment) Expertise: Familiarity with TME processes and features Secure Boot Knowledge: Understanding of secure boot mechanisms and validation processes Automation Enhancement: Experience in enhancing automation...

Join the RISC-V Revolution! As a highly skilled FPGA and emulation engineer lead at MIPS, you will play a crucial role in building FPGA designs for our CPU`s (64-bit and 32-bit) and SOCs. Your responsibilities will include designing, building, and developing innovative FPGA and emulation platform solutions, performing pre-silicon CPU and system validation, analyzing system performance, and creating tailored FPGA prototyping platforms. You will collaborate closely with customer teams and provide technical support for FPGA systems in various contexts. In this role, you will have the opportunity to contribute across the full silicon-to-software lifecycle, combining software engineering with pos...

As a member of the Common Hardware Group (CHG) at Cisco, you will be part of a team that delivers cutting-edge silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. Our work involves designing networking hardware for Enterprises, Service Providers, Public Sector, and Non-Profit Organizations worldwide. Join us in shaping Cisco's groundbreaking solutions by participating in the design, development, and testing of advanced ASICs that are at the forefront of the industry. Your role will involve implementing Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics requirements of the designs. You will collabora...

As a Senior Post-Silicon Validation (PSV) Engineer / Lead, you will be responsible for the post-silicon bench validation of Analog Mixed Signal (CCC) IPs / SoCs. This includes executing validation across Process, Voltage, and Temperature (PVT) corners, as well as performing system-level validation using lab instruments such as oscilloscopes and logic analyzers. Your role will involve validating PCIE interface functionality and performance, along with debugging and resolving silicon-level issues by collaborating with cross-functional teams including design, verification, and test. To excel in this position, you should have a strong hands-on experience in bench validation of silicon, a good un...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the worlds most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Principal Systems Debug Lead THE ROLE: Technical leader responsible for System and Silicon D...

Ventana Micro Systems is at the forefront of the two hottest trends that are revolutionizing the semiconductor industry: RISC-V and Chiplet Architecture. Check out our CEO talking with global tech analyst Patrick Moorhead about how Ventana combines the extensibility of RISC-V with chiplet technology to create customer-driven innovation for best-in-class solutions for the data center. Ventana is well-funded and backed by some of the largest strategic investors in the industry with the goal of building best-in-class CPU cores for cloud, enterprise, 5G, and Edge computing. We invite you to join the revolution and contribute to one of the Hottest Semiconductor startups in the industry. CPU Micro...

Who We Are The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. With ~2,100 employees across 16 countries, we design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfoli...