Performance Analysis Intern

1 - 2 years

0 Lacs

Posted:None| Platform: Naukri logo

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Job Type

Internship

Job Description

We are seeking a motivated and technically skilled intern (2 positions) to lead the transformation of our existing RISC-V Application Profiler into a comprehensive trace analysis suite equivalent to ARMs Tarmac Trace Utilities. This role combines systems programming, performance analysis, and benchmark development to create next-generation profiling tools for RISC-V processors.

Key Responsibilities
Phase 1 (4-6 months): RISC-V Profiler Enhancement
  • Add interactive trace browsing capabilities
  • Develop function call tree analysis
  • Create multiple output formats (flame graphs, histograms, etc)
    Phase 2 (3-4 months): Microbenchmark Framework
    • Build automated benchmark decomposition tools
    • On-board new benchmark suits into our existing CI/CD framework
    • Extract microbenchmarks from standard suites (CoreMark, SPEC CPU, etc)
    • Develop pattern recognition for performance-critical code
    • Create validation framework
      Phase 3 (1-2 months): Integration & Testing
      • Comprehensive testing and documentation
      • Performance validation

        Required Skills
        • Languages: Python, C/C++, RISC-V Assembly (mandatory)
        • Knowledge: Computer architecture, RISC-V, performance analysis
        • Experience: Systems programming, profiling tools, benchmarking
          Deliverables
          • Enhanced RISC-V profiler with ARM Tarmac-equivalent features
          • 50+ validated microbenchmarks from standard benchmark suites
          • Automated benchmark decomposition framework
          • Complete documentation and user guides

            Requirements
            • Enrolled in / recently graduated from a Bachelor, Masters or PhD program in Computer Engineering, Computer Science, Electrical Engineering, or a related technical discipline.
            • Strong programming fundamentals in C/C++ and Python.
            • Strong RISC-V fundamentals and Computer Architecture.
            • Ability to work 30-40 hours per week for a minimum of 24-weeks, 36-48 weeks preferable.

              Benefits
              This role offers unique exposure to the growing RISC-V ecosystem and potential for full-time conversion based on performance.

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