Lead Engineer - Analog

Silicon Labs

7 - 12 years

8 - 12 Lacs

hyderabad

Posted:1 day ago| Platform:

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Skills Required

cmos mixed signal electronics vlsi design c software testing semiconductor simulation lvs problem solving vhdl verilog microcontroller ic design silicon cadence virtuoso drc leadership vlsi eda tools communication skills architecture analog layout

Work Mode

Work from Office

Job Type

Full Time

Job Description

Define the architecture and implement transistor-level design of analog and mixed-signal blocks for Power efficient Iot ICs.
Perform pre- and post-layout simulations and analysis across PVT corners using industry-standard EDA tools
Work closely with layout engineers to optimize performance, area, and noise/EMI sensitivity.
Collaborate with cross-functional teams across design, verification, test, validation,
Support silicon bring-up, characterization, and debug
Produce high quality review and spec documents
Promote IP reuse, documentation best practices, and patent/IP generation initiatives.
Guide junior engineers as and when needed.

Requirements

M.E./M.Tech or Phd in Electronics Engineering, VLSI, or related field.
7+ years of industry experience in analog/mixed signal IC design
Strong hands on expertise with Industry Standard EDA tools.
Proven background in design of state of the are analog blocks (ADC, DAC, PLL)
Practical experience guiding layout for precision analog and closing PEX/EMIR aware performance.
Excellent problem solving, leadership, and communication skills; ability to drive cross functional decisions.
Preferred Qualifications
Silicon proven design experience one or more IP classes: PLLs/clocking, data converters (ADC/DAC), LDO/DCDC and power management, bandgaps/references, sensor interfaces.
Background in low power techniques, multi supply/multi domain integration.Understanding of yield/risk management (corner selection, guard banding, mismatch budgeting).

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