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Advanced Micro Devices, Inc
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IP/RTL Design Engineer

IP/RTL Design Engineer

Advanced Micro Devices, Inc

2 - 6 years

4 - 8 Lacs

bengaluru

Posted:1 day ago| Platform:

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Skills Required

timing closure version control digital design power management analytical rtl coding verilog silicon mts recruitment

Work Mode

Work from Office

Job Type

Full Time

Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you ll discover the real differentiator is our culture. We push the limits of innovation to solve the world s most important challenges striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

MTS SILICON DESIGN ENGINEER

THE ROLE:

The focus of this role is to microarchitect , design and deliver data fabric IP RTL . These include new and existing features and components for AMD s data fabric IP , working in close coordination with verification to ensure design quality.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

Digital design implementation and micro-architecture of components of the Infinity Data Fabric
Micro-architecture and RTL coding in Verilog/SystemVerilog of Data fabric components and its features as the fabric scales for server, data centre application systems.
Design of Power Management flows and architecture for the fabric
Collaborate with architectss to understand the new features to be implemente
Knowledge of cache coherency and/or fabric /NOC design is a plus
Leaf level cache designing
Collaborating with verification and integration teams to resolve inter IP integration issues
Design flow quality checks - Lint, CDC, RDC and others
Timing closure - timing constraints, synthesis, logic-depth reduction
Design area optimizations
Low power design techniques, UPF included

PREFERRED EXPERIENCE:

8 to 14 years of working experience in ASIC design
Proficiency in Verilog/SystemVerilog RTL
Experience in full IP design cycle, requirements definition, architecture and microarchitecture specification.
Active knowledge of ASIC design quality flows
Knowledge of cache coherency and /or fabric /NOC design is a plus
Low power analysis and design
Version control systems such as Perforce, Git

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in computer engineering/Electrical Engineering
#LI-BM2

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Advanced Micro Devices, Inc

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IP/RTL Design Engineer