107 Functional Verification Jobs

Expertise in Digital Verification Expertise in Functional Verification Expertise in SOC / IP Verification Expertise in working on system Verilog assertions & test benches Expertise in working on OVM / UVM / VMM based verification flow Expertise in working on ARM processor Expertise in working on AMBA bus protocols (AXI, AHB, APB) Expertise in CXL or PCIe Protocol Verification Expertise in simulation tools (VCS, ModelSim, Questa) Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. Expertise in analysing Code Coverage, Functional Coverage and Assertions. Expertise in verification of complex SoCs. Expertise in Test Plan creation and Verification technologies like Code Coverage, Functional coverage, assertion based verification. Expertise in Verification of complex datapath, DSP based ASICs Good knowledge in gate-level simulation, and Scripting languages like Python, TCL Expert level proficiency (Oral + Written) in Chinese language is mandatory incase Beijing, Taiwan are the preferred work locations Preferred resources with valid regional work permit. Location - Bangalore, Beijing, Dallas, Romania, Taiwan

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Job Description We are looking for an experienced Design Verification Engineer to join our team and contribute to the verification of complex SoC/ASIC designs. The ideal candidate will have strong expertise in verification methodologies, testbench development, and debugging. Key Responsibilities: Develop and implement verification plans, environments, and testbenches using SystemVerilog/UVM. Write and execute test cases for functional, regression, and coverage-driven verification. Perform debugging and root cause analysis for design and verification issues. Collaborate with RTL design, architecture, and validation teams to ensure quality deliverables. Analyze functional coverage metrics and enhance test suites for improved quality. Work on assertion-based and formal verification techniques where applicable. Contribute to automation and scripting to streamline verification flows.

Qualcomm India Private Limited is seeking talented engineers for CPU RTL development targeted at high-performance, low-power devices. As a CPU Micro-architecture and RTL Design Engineer, you will collaborate with chip architects to conceptualize the micro-architecture and contribute to architecture/product definition early in the product life-cycle. Your responsibilities will include performance exploration, microarchitecture development and specification, RTL ownership to achieve power, performance, area, and timing goals, functional verification support, performance verification support, and design delivery in coordination with a multi-functional engineering team. To excel in this role, you should have a thorough understanding of microprocessor architecture, expertise in areas like instruction fetch and decode, Verilog/VHDL knowledge, logic design principles, low power microarchitecture techniques, high-performance techniques, and experience with scripting languages such as Perl or Python. Minimum qualifications include a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of Hardware Engineering experience. Preferred qualifications involve a Master's degree in a relevant field, 8+ years of Hardware Engineering experience, and experience in circuit design and hardware measurement instruments. Your principal duties will involve leveraging advanced hardware knowledge to plan, optimize, verify, and test critical electronic systems, integrate complex features into hardware designs, collaborate with cross-functional teams, evaluate and develop novel manufacturing solutions, and write detailed technical documentation for complex hardware projects. As a qualified candidate, you are expected to work independently with minimal supervision, provide guidance to team members, make significant decisions affecting work beyond immediate groups, possess strong communication skills, and have a moderate influence on key organizational decisions. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require an accommodation during the application/hiring process, please contact disability-accommodations@qualcomm.com. Additionally, Qualcomm expects all employees to adhere to applicable policies and procedures, including those related to confidentiality and protection of company information. Please note that Qualcomm's Careers Site is intended for individuals seeking job opportunities directly with Qualcomm, and unsolicited submissions from staffing and recruiting agencies are not accepted. For more information about this role, please reach out to Qualcomm Careers directly.,

As a Localization & Quality Assurance Tester specialized in Multilingual (Mobile Applications) with proficiency in Bengali, Tamil, and Gujarati, your role will involve validating and testing mobile UI, voice interactions, and contextual prompts in regional languages to ensure cultural and linguistic accuracy for Indian markets. You will be responsible for conducting in-depth localization validation for Bengali, Tamil, and Gujarati languages, identifying cultural adaptation issues in UI text, voice interactions, and contextual prompts, and executing end-to-end testing in dialect-specific scenarios, including voice recognition testing. Additionally, you will design and execute test cases across mobile platforms, utilize Jira to manage the defect lifecycle, conduct ASR/TTS testing tasks, and prepare and execute localized functional test designs. Furthermore, you will perform specialized testing to validate app adaptability in low-network environments and functional verification for multi-religious festival scenarios. To qualify for this position, you must hold a Bachelor's degree or higher in Computer Science / Information Technology or a related field, have a minimum of 2 years of mobile application testing experience with examples of executed test cases, possess a strong understanding of Android/iOS testing tools and methodologies, and be proficient in ADB commands and mobile debugging. Native fluency in either Bengali, Tamil, or Gujarati (spoken & written) is required, along with strong analytical and problem-solving skills, the ability to work in multicultural and cross-functional teams, and a keen attention to detail and commitment to high-quality deliverables.,

As a Lead Product Engineer at Cadence, you will drive the development of cutting-edge products and technologies in the UCIe domain of Verification IP family. You will play a pivotal role in accelerating the VIP portfolio adoption at Cadence's top tier customers by providing expert support in pre-sales technical activities. Your responsibilities will include translating high-level requirements from customers into technical specifications, developing product definitions that align with customer needs, and ensuring successful product knowledge transfer across field engineers and customers. To excel in this role, you must have a solid background with at least 5 to 8 years of experience in Verification and Design. Working knowledge of the UCIe domain and functional verification, experience in developing verification environments using System Verilog, and familiarity with the UVM methodology are essential. Strong problem-solving and debugging skills are a must, as you will be required to analyze complex situations and data to drive product success. Your qualifications should include a BE/BTech/ME/MS/MTech degree in Electrical, Electronics, Computer Science, or equivalent field. In addition to technical expertise, you must possess excellent written, verbal, and presentation skills to establish effective working relationships with customers and internal stakeholders. Your ability to think creatively, work collaboratively across functions and geographies, and maintain integrity while striving for excellence will be key to your success in this role. Join us at Cadence, where you will have the opportunity to work with a diverse team of passionate and talented individuals dedicated to making a positive impact on the world of technology. Be part of our innovative culture that values creativity, collaboration, and continuous learning. We are committed to supporting your physical and mental well-being, career development, and success, and we celebrate achievements that recognize the unique needs of our employees. At Cadence, we are solving challenges that others can't. Come be a part of our team and help us make a difference.,

As a Lead Product Engineer at Cadence, you will be driving the development of cutting-edge products and technologies in the UCIe domain of Verification IP family. With a primary responsibility for the success of the product/technology, you will play a crucial role in accelerating the VIP portfolio adoption at our top-tier customers by providing expert support in pre-sales technical activities. Your role will involve leveraging your strong verification expertise to understand customer design and verification flows, translating high-level requirements into technical specifications, and driving product definitions that align with customer needs. In this role, you will be expected to be an expert in UCIe domain and protocol, with working knowledge and experience in developing verification environments using System Verilog. Your experience with the UVM methodology and problem-solving skills will be essential in solving complex problems and ensuring the alignment of all dimensions of the product. Collaboration with cross-functional teams such as R&D, Marketing, and support will be crucial to ensure the success of the product. The role of Lead Product Engineer requires approximately 20% travel on average, offering you the opportunity to work with a diverse team of passionate and talented individuals. Cadence's employee-friendly policies focus on your physical and mental well-being, career development, learning opportunities, and celebrating success, ensuring a supportive and collaborative work environment that promotes innovation and creativity. To qualify for this role, you should have at least 5 to 8 years of experience in Verification and Design, along with a BE/BTech/ME/MS/MTech degree in Electrical/Electronics/Computer Science or equivalent. Strong written, verbal, and presentation skills are essential, along with the ability to establish close working relationships with customers and management. Your willingness to explore unconventional solutions, work effectively across functions and geographies, and strive for excellence while operating with integrity will be key to your success in this role. Join us at Cadence and be part of a team that is dedicated to making an impact in the world of technology. Your contributions will help us solve challenges that others can't, driving innovation and success for our customers, communities, and each other every day.,

The Verification role requires you to be proficient in Functional and Performance verification, utilizing effective methodologies at different levels such as Module, Subsystem, SoC, and System. It is essential to have the skills to translate requirements into a verifiable plan. You will collaborate with SoC and IP developers locally and globally to implement best practices and enhance productivity continuously. A meticulous approach towards achieving zero defects is crucial. Your responsibilities will include creating verification test benches, verification components, test cases for simulation, formal verification, and emulation. Additionally, you will be responsible for debugging failures and formulating simulation scenarios for various analyses. Your key tasks will involve team leadership, technical guidance, and Verification planning. You will be responsible for developing, fine-tuning, and implementing verification test benches. Furthermore, you will create verification test bench components like drivers, monitors, response checkers, and leverage advanced UVM VIPs. Your role will also entail generating direct and constrained-random stimuli using C and SystemVerilog, examining RTL code, functional coverage, and assertion results. You will be expected to work on functional coverage development and system Verilog assertions. Proficiency in formal verification techniques, robust debugging skills, failure re-creation, and root cause analysis are essential requirements. Strong debugging and logical reasoning skills are crucial for this position. To excel in this role, you must have a strong background in C and UVM/SystemVerilog-based Test environments. Understanding the design/architecture and the ability to debug RTL/Gate netlist are mandatory skills. Coverage-driven Verification expertise is required to fulfill the Functional and Performance requirements of the SoC and manage regression effectively. Knowledge of Microcontroller architecture, ARM Cores, Interconnect (NIC, FlexNoC), Cache Coherency, and Bus Protocols like AHB/AMBA, AXI, ACE is essential. Additional skills that would be advantageous for this role include experience with Memory controllers (Flash, SRAM, DDR3/4/LPDDR), Protocols such as PCIe, MIPI, GPU, Ethernet, and Serial/Quad flash. Familiarity with Formal verification methodologies and Apps, AVIP, PinMuxing Verification, Randomization, and Low Power intent verification using UPF is beneficial. Exposure to pre-silicon validation/emulation tools like Veloce, Zebu, FPGA Prototyping would be considered a plus.,

Build your career with Sykatiya Technologies. Sykatiya Technologies values technical ability and attitude within its highly talented team, which is reflected in the contributions made to customer projects. The team consists of skilled engineers and experts specializing in Design Verification, DFT/Test, Physical Design, and Analog Design for ASICs. This position is for IP/SOC/ASIC Verification with a required experience level of 3-20 years. The location for this role is in Bangalore & Hyderabad. As a member of the ASIC verification team, you will be responsible for the functional verification of ASIC IPs. The verification methodology utilizes advanced techniques and tools such as coverage-driven constrained random verification and formal verification. Object-oriented architectures and frameworks play a crucial role in the design and implementation of verification environments. The ideal candidate will possess expertise and aptitude in verifying functions like image processing, video compression, and computer vision. Additionally, as a verification engineer, you will have the opportunity to delve into the algorithms supporting the hardware. We are seeking an experienced engineer with exceptional programming skills and a genuine interest in ASIC verification. The verification environments at Sykatiya Technologies are complex, requiring individuals who can comprehend, implement, and maintain intricate software systems effectively. Preferred qualifications for this role include prior experience in hardware verification using SystemVerilog, UVM, low power verification, and formal methods. The ideal candidate is expected to be analytical, systematic, and detail-oriented in their approach. Join our team at Sykatiya Technologies and be a part of a dynamic environment where your skills and expertise in ASIC verification will be valued and nurtured.,

Siemens EDA is a global technology leader in Electronic Design Automation software, enabling companies worldwide to develop innovative electronic products efficiently. Customers utilize Siemens EDA's tools to drive technological advancements in chip, board, and system design within a complex landscape. Based in Bengaluru, this role offers opportunities to travel to various locations in India and globally, providing exposure to diverse projects that impact cities, countries, and future innovations. As part of the team, your responsibilities include deploying Siemens EDA ProFPGA prototyping software and hardware solutions at customer sites, ensuring successful design implementation. Collaboration with the R&D team is essential to address challenges, enhance product specifications, and develop effective solutions. Additionally, training Application Engineers (AEs) and customers on the solutions, winning pre-sales engagements, and supporting early customer deployments are key aspects of this role. Your role also involves maximizing customer value by developing methodologies that leverage the solutions" capabilities, keeping customers informed of the latest enhancements, and providing valuable insights to the R&D and marketing teams. Collaboration with Quality Assurance (QA) and Documentation (Docs) teams to improve testing and documentation processes is crucial, along with creating examples and tutorials for product delivery. The ideal candidate possesses a deep understanding of FPGA-based hardware prototyping platforms, multi-FPGA prototyping flows, and practical application of FPGA prototyping systems. Proficiency in HDLs (Verilog/SV) for RTL design, HVLs (SV/UVM) for verification, functional verification, RTL synthesis, and PnR flows is required. Familiarity with SoC design concepts, test bench acceleration, hardware/software debug solutions, and excellent communication skills are also essential. Siemens is a diverse community of over 377,000 individuals across 200 countries, united in building the future each day. The company values equality and encourages applications that reflect the diversity of the communities it serves. Employment decisions at Siemens are based on qualifications, merit, and business requirements. Join Siemens Software in shaping tomorrow's innovations where today meets tomorrow.,

As a Senior Design/Verification - Subsystems Lead at Synopsys, you will be part of the Digital IP Subsystem team in Bangalore/Hyderabad, India, contributing to cutting-edge technological work in the field of integrated circuits. Your expertise will be crucial in driving the design and verification efforts for complex IP/Subsystem/SoC blocks. Design Lead: In the role of RTL Design Lead, you will be responsible for ensuring bug-free RTL from requirements or specifications. Your experience in multiple tape-outs and driving the design effort for complex blocks will be instrumental in the success of our projects. Verification Lead: As a Verification Lead, your role will involve catching bugs and ensuring that the design intent is met. Your expertise in leading multiple tape-outs and closing the verification of complex blocks will be essential in delivering high-quality results. For the Design role, we are looking for a Senior RTL Subsystems Designer Lead with a minimum of 8 years of experience. You should be able to drive the Subsystem life cycle from requirements to final release phases, work on defining micro-architectures, coding RTL with best practices, and collaborate with cross-functional teams to drive projects to completion. Key skills required for the Design role include proficiency with standard protocols such as PCIe, DDR, UFS, USB, AMBA, hands-on experience with low power design, understanding of DFT requirements and architecture, and the ability to work effectively with cross-functional teams. For the Verification role, we are seeking a Senior Verification Lead with a minimum of 8 years of experience. You should be able to drive the complete Verification cycle, including crafting test plans, architecting verification environments, developing test infrastructure, and driving closure with coverage. Key skills required for the Verification role include proficiency with Functional Verification of standard protocols such as PCIe, DDR, UFS, USB, AMBA, power-aware Verification with UPF, gate-level verification hands-on experience, and the ability to work effectively with cross-functional teams to drive projects to completion. If you are passionate about pushing the boundaries of technology and working on challenging projects in the SysMoore era, we invite you to join our dynamic team at Synopsys and contribute to the exciting world of integrated circuit design and verification.,

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL). Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools. Experience in process automation with scripting. Experience with SystemVerilog, C++, UVM. Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog. Experience designing and implementing complex functional verification environments is required. Knowledge of protocols like PCIe, USB3/4, DP an added advantage. Were doing work that matters. Help us solve what others cant. Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Product Engineer Location: Bangalore Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the worlds most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadences employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence One Team culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each otherevery day. Job Summary Drives development of products and technologies and has material responsibility for the success of that product/technology. VIP PE is expected to be an expert in UCIe domain of Verification IP family- protocol and product-wise. PE main role is to help accelerate VIP portfolio adoption at Cadences top tier customers by supporting pre-sales technical activities. To ensure that, one must have strong verification expertise and understand customer design and verification flows. As a UCIe VIP and protocol expert, PE drives product knowledge transfer across our field engineers and customer, providing training and developing collaterals. The PE will also need to translate high-level requirements from customers into a technical spec and drive the product definition that fits the customer needs. PE is expected to work independently and collaborate with other team members ( RnD, Marketing, support) to ensure all dimensions of the product are aligned. This role requires approximately 20% travel on average. Experience and Technical Skills required (edit as per the requirement): At least 5 to 8 years of experience with Verification and Design Working knowledge with UCIe domain and functional verification. Experience with Developing Verification environments using System Verilog Working knowledge and experience with the UVM methodology Good experience on solving complex problems where analysis of situations or data requires an in-depth evaluation of various factors. Excellent problem-solving and debugging skills Qualifications BE/BTech/ME/MS/MTech in Electrical/Electronics/Computer Science or equivalent Behavioral Skills Required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore whats possible to get the job done, including creative use of unconventional solutions Work effectively across functions and geographies Push to raise the bar while always operating with integrity Were doing work that matters. Help us solve what others cant. Show more Show less

You are an experienced RTL/FPGA Design Engineer with a minimum of 3 - 7 years of experience in the VLSI domain. You hold a BE/B.Tech degree in Electronics/Electronics & Communication or ME/M.Tech in Electronics/VLSI Design or a closely related field from a recognized university with a strong academic background. Your role will be based in Ahmedabad or Bangalore. In this role, you will be responsible for RTL programming using Verilog/System Verilog or VHDL, possessing knowledge of the complete FPGA Design Development flow. You should be proficient with FPGA Development Tools such as Quartus, Modelsim, Vivado, Xilinx ISE, Libero, etc. Additionally, you will engage in functional verification using Verilog/System Verilog or VHDL, optimize RTL code to meet timings and on-chip resources, and support all phases of FPGA-based product development activities. System Architecture Design, testing, and troubleshooting of hardware will also be part of your responsibilities. To excel in this position, you must have experience with Verilog/SystemVerilog or VHDL for design and verification, along with a deep understanding of FPGA design flow/methodology, IP integration, and design collateral. You should be capable of developing small IP blocks from scratch and conducting basic functional verification. Familiarity with protocols like SPI, I2C, UART, and AXI, as well as knowledge of Altera Quartus II Tool, Questasim, Modelsim, Xilinx tools like ISE and Vivado, and Microsemi tools like Libero, are essential. Understanding of USB, Ethernet, and external memories such as DDR, QDR RAM, and QSPI-NOR based Flash is also required. In terms of personal competencies, you should be self-motivated to learn and contribute, able to work effectively with global teams, and willing to collaborate in a team-oriented environment. Prioritization and execution of tasks to achieve goals in a fast-paced environment, along with strong problem-solving skills, are valuable assets. Your passion for writing clean and neat code that aligns with coding guidelines will be highly appreciated. If you meet these qualifications and are excited about the opportunity to work in the VLSI domain as an RTL/FPGA Design Engineer, we encourage you to apply now.,

Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL) With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs You possess excellent problem-solving skills and can work effectively in a collaborative environment Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs, What Youll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards, Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases, Building/updating functional verification environments to execute test plans, Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs, Performing simulation, random and direct stimulus development, and coverage review, Working closely with digital designers for debugging and achieving the desired coverage, The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology, Enhancing the reliability and performance of Synopsys' products through meticulous verification processes, Driving innovation in the semiconductor industry by verifying complex digital designs, Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards, Improving the efficiency of the verification process through automation and advanced verification methodologies, Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers, What Youll Need: Tech/M Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog, Proficiency in scripting and automation using TCL, PERL, or Python, Strong debug and diagnostic skills, Experience in building and updating functional verification environments, Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams, A proactive problem solver with a keen eye for detail, An enthusiastic learner with a passion for technology and innovation, A team player who thrives in a collaborative environment, A highly organized individual who can manage multiple tasks and priorities effectively, The Team Youll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process, Show

As a Functional Verification Engineer at AMD in Hyderabad, you will be responsible for verifying the functionality of complex System on Chip (SOC) designs using industry-standard verification methodologies. With 4-10 years of experience, you will play a key role in ensuring the quality and reliability of ASIC designs. You should be proficient in UVM (Universal Verification Methodology) and have a strong command of Verilog or SystemVerilog. Additionally, knowledge of AMBA Bus Protocols is essential for this role. Your expertise in functional verification, design verification (DV), and ASIC verification will be crucial in meeting the verification goals of the projects. Working closely with cross-functional teams, you will have the opportunity to contribute to cutting-edge technologies and innovative solutions. This position requires immediate to 45 days notice period availability. If you are passionate about verification engineering and have a solid foundation in AMBA, SystemVerilog, SOC, Verilog, and other relevant skills, we invite you to join our team at AMD and be part of our dynamic work environment. Join us in shaping the future of technology with your verification expertise.,

As an RTL/FPGA Design Engineer in the VLSI domain, you will play a crucial role in developing FPGA-based products. With a focus on RTL programming using Verilog/System Verilog or VHDL, you will be responsible for optimizing RTL code to meet timing requirements and on-chip resource constraints. Your expertise in FPGA Development Tools such as Quartus, Modelsim, Vivado, Xilinx ISE, and Libero will be essential in ensuring the successful completion of projects. Your responsibilities will include functional verification using Verilog/System Verilog or VHDL, system architecture design, and testing/troubleshooting of hardware components. Additionally, you will be required to support all phases of FPGA-based product development activities, demonstrating a strong understanding of FPGA design flow/methodology and IP integration. To excel in this role, you should hold a BE/B.Tech or ME/M.Tech degree in Electronics/Electronics & Communication or Electronics/VLSI Design from a recognized university. Proficiency in Verilog/SystemVerilog or VHDL for design and verification is essential, along with knowledge of protocols like SPI, I2C, UART, and AXI. Familiarity with tools such as Quartus II, Questasim, Modelsim, ISE, Vivado, and libero will be advantageous. As a self-motivated individual, you should be eager to learn and contribute effectively within a team-oriented environment. Your ability to prioritize tasks, solve problems creatively, and write clean code following coding guidelines will be highly valued. If you are passionate about working in a dynamic and innovative setting, we encourage you to apply for this exciting opportunity in Ahmedabad or Bangalore. Join us and be a part of our vibrant team dedicated to pushing the boundaries of VLSI design and FPGA technology. Apply now to explore this role further and take the next step in your career growth.,

Role & responsibilities Strong verification expertise using Verilog and SystemVerilog, with solid understanding of UVM methodology and hands-on experience writing test-benches. Proficient in debugging testcases and verifying processor-based subsystems. Knowledge of AMBA protocols (AXI, AHB, APB) is a plus. Exposure to Arm-based SoCs and strong grasp of digital design fundamentals. Experience with scripting in Perl, TCL, Make, and Shell.

Software Backend Developers at IBM are the backbone of our strategic initiatives to design, code, test, and provide industry leading solutions that make the world run today – planes and trains take off on time, bank transactions complete in the blink ofan eye and the world remains safe because of the work our software developers do. Whether you are working on projects internally or for a client, software development is critical to the success of IBM and our clients worldwide. At IBM, you will use the latestsoftware development/testing tools, techniques and approaches and work with leading minds in the industry to build solutions you can be proud of. AIX Organization primarily owns the AIX/VIOS development, with having yearly release cycle. As a Software Backend Developer, you shall understand the AIX/VIOS development, test and support process, and develop an overall functional verification plan by understanding the products, layers, and components. In addition, it’s important to understand and grasp the technical architecture of the components. The AIX organization primarily works through three functions – Development, Test, and L3 Support. A person should be able to work seamlessly in any of the functions as well as cross-function, own the product delivery end-to-end and yield the tangible results as set forth by the product owner/ Lead. A Software Backend developer works in an agile, collaborative environment to recommend and develop testing standards and the application of quality technologies. Encourages application development that builds testability from the ground up. Ensures the product is robust and failure scenarios are considered and refactored. Collaborates with cross-functional team members on story development, from before definition through final deployment. Performs exploratory testing using industry-leading practices. Discovers defects/bugs and works with coders and POs to determine root cause and how to prevent similar issues from happening in the future. Drives adoption of test automation - unit tests, integration tests, functional tests. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Minimum 4 years of experience in functional verification of software developed mainly handling C/C++ applications in UNIX domain. Good understanding of Unix OS Internals - Kernel programming, Process management, Memory management, Virtualization - CPU, Memory. Good knowledge in file systems, storage disk management and Unix networking. Good knowledge in UNIX shell scripting, Perl, and Python. Proven debugging and problem-solving skills. Proven knowledge of test processes, test development, test tools, test plan, and execution records. Should have a fair understanding of functional verification of the network protocols/fibre channel protocols, device drivers available in Unix/Linux Operating Systems. Preferred technical and professional experience 3-4 years of development/functional verification experience involving UNIX/OS internals. 3-4 years of experience in product development Passionate about Functional Verification Ability to articulate and compare alternative approaches.

Your Role and Responsibilities Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Required Technical and Professional Expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Nice to haves - Knowledge of instruction dispatch and Arithmetic units. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Knowledge of verification principles and coverage. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

Your Role and Responsibilities Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Required Technical and Professional Expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Nice to haves - Knowledge of instruction dispatch and Arithmetic unit. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Knowledge of verification principles and coverage. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

As a Formal verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Develop skills in IBM Formal verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 – 10 years of relevant industry experience Proven experience in Formal/Functional Verification - Demonstrated execution experience of verification of logic blocks verification. Knowledge of formal methodology, Knowledge of HDLs (Verilog, VHDL, SV), Good programming skills in python, processor core u-arch skills Exposure in developing testbench environment, debugging and triaging fails. Good communication skills and be able to work effectively in a global team environment. Drive verification coverage closure, lead verification team. Drive complex scenarios, participate in High level design discussions. Track record in leading teams. Preferred technical and professional experience Writing test plans, building random / exhaustive formal verification environment, functional and coverage analysis and debug. Good understanding of the Server System

Responsibilities Be the primary point of contact for IP and SoC functional verification for cross-functional teams. Participate with architecture, design teams, silicon validation, and software teams in defining the overall verification strategy of our SoCs. Develop high-performance and low power hardware to enable Google's continuous innovations in consumer hardware. Minimum qualifications: Bachelor's degree in Computer Science or Electrical Engineering or equivalent practical experience. 5 years of experience in driving/leading functional verification for Intellectual Properties (IPs) and System-on-a-Chip (SoCs). Experience working with System Verilog and Universal Verification Methodology (UVM). Preferred qualifications: Master's degree in Computer Science or Electrical Engineering or equivalent practical experience. Experience leading design verification of an SoC or large ASICs. Experience in different verification techniques and methodologies, including formal, Gate Level Simulation, Unified Power Format based Power simulations, UVM, etc. to achieve bug-free Silicon in complex SoC. Experience in scripting languages (e.g., Python, Perl) for automation and analysis. Experience in driving cross-functional teams for high quality tape-outs.

Qualcomm India Private Limited is a leading technology innovator that is dedicated to pushing the boundaries of what is possible. As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. These systems encompass a wide range of components such as yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Your work will contribute to the development of cutting-edge, world-class products that drive digital transformation and enable next-generation experiences. To qualify for this role, you must hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with at least 3 years of Hardware Engineering or related work experience. Alternatively, a Master's degree with 2+ years of experience or a PhD with 1+ year of experience in the relevant field will also be considered. As a Hardware Engineer at Qualcomm, your responsibilities will include front-end implementation of SERDES high-speed Interface PHY designs, RTL development and validation, collaboration with the functional verification team, development of timing constraints, UPF writing, DFT insertion, ATPG analysis, and support for SoC integration and chip level pre/post-silicon debug. The ideal candidate for this role should possess an MTech/BTech in EE/CS with 4 to 7 years of hardware engineering experience. You should have expertise in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA, high-speed interface design, and industry-standard protocols like USB/PCIe/MIPI. Experience with post-silicon bring-up and debug is considered a plus, along with the ability to collaborate effectively with global teams and excellent communication skills. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, you can reach out to disability-accommodations@qualcomm.com or Qualcomm's toll-free number. The company expects its employees to adhere to all applicable policies and procedures, including those related to the protection of confidential information. Please note that Qualcomm's Careers Site is intended for individuals seeking jobs directly at Qualcomm. Staffing and recruiting agencies are not authorized to submit profiles, applications, or resumes through the site. Unsolicited submissions from agencies will not be accepted, and Qualcomm does not entertain any fees related to such submissions. For further information about this role, you can contact Qualcomm Careers for assistance.,