Design Verification Engineer

Manage SOC Design Verification efforts for complex projects, ensuring the successful execution of verification plans.

7 Years experience required

About the Role

Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR and HBM.

Responsibilities

Manage SOC Design Verification efforts for complex projects.

Develop and implement comprehensive verification strategies.

Create test plans and test benches for high-speed SOCs.

Include low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI.

Incorporate high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR and HBM.

Experience on Gate-level simulations, and power-aware verification using Xprop and UPF is an added advantage.

Analyze and implement System Verilog assertions and coverage (code, toggle, functional).

Demonstrate dedication, hard work, and commitment to achieving project goals and deadlines.

Qualifications

Education details-Engineering or Equivalent

7 years experience is required

Required Skills

Skills related to SOC Design Verification and verification strategies.

Location

Pune/Ahmedabad/Bangalore

Preferred Skills

Experience on Gate-level simulations, and power-aware verification using Xprop and UPF.

Immediate joiners to 30 days are preferred.