928 Vhdl Jobs - Page 30

Work as a DFT Product Validation Engineer on insertion and validation of DFT technologies such as 1500 Wrapper, Compression, RTL DFT, Low Pin Count Test, Hierarchical Test, LBIST etc. using Cadence Synthesis tool Genus and ATPG using Cadence Test tool Modus on in-house and customer designs. Create testplans for verification of new features and execute them by creating new test cases requiring application of Design & DFT skills; Report bugs/enhancements in tool. Collaborate with R&D and Product Engineering teams to review feature specifications, testplans & customer issues. Debug issues reported by customers and suggest/implement measures to plug the gaps. Position Requirements B. E/B. Tech with 2+ years or M. E/MTech inElectronics/Electricalof experience Strong in Digital electronics, Verilog Good understanding of DFT techniques and methodologies Familiarity with Test standards like 1149. 1, 1500, 1687 is a plus Experience with Cadence Test or other Test tools is preferred Modus is a DFT (Design for Testability) software tool from Cadence used by leading chip design companies during DFT synthesis & ATPG (Automatic Test Pattern Generation) phase of chip design We re doing work that matters. Help us solve what others can t.

Candidate will be part of VC PS Noida team. Design, develop, troubleshoot the core algorithms. Design and develop standard and customized features / checks in VC PS for inference, propagation and verification. Will be working with other local and global teams. Design and development of state of the art EDA tools involving development of new and innovative algorithms. Create test cases to test the developed feature. Skills Required Ability to develop new software architecture and good leadership skills. Fluent in C/C++ with extensive work experience in data-structures and algorithms. Excellent algorithm analysis skills and a good knowledge of data structures. Good knowledge of Tcl and Perl-based development on Unix. Good knowledge of Verilog, SystemVerilog & VHDL HDL. Familiarity with ASIC design flow and the EDA tools and methodologies used therein. Familiarity with multi-threaded and distributed code development. Self-motivation, self- discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Quality focus - one who believes in quality and wants to make a difference. Experience of production code development on Unix/Linux platforms. Show more Show less

Role: RTL Engineer Employment Type: Full Time Educational Qualification: Bachelor's degree in Electrical Engineering, Computer Science, or a related field. Work Experience: 2–4 years of industry experience. Role Description: Pixxel is widely considered to be one of the fastest-growing aerospace start-ups. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of earth observation. Come join our Avionics team and help us build future architectures that will continue to drive us forward in the field. Responsibilities & Duties: Participate in next-generation system architecture – a full system effort spanning mission planning, software, hardware, and other sub-systems. Develop custom IP for new features of the Pixxel camera payload and satellite bus. Understand the design requirements, establish the design infrastructure, support verification engineers, and test the correctness of the design. Realize high-reliability digital design targeting state-of-the-art Xilinx FPGAs. Participate in conceptual design studies of new spacecraft. Desirable Skills & Certifications: Comfortable working with Xilinx Vivado Design Suite. Experience with external memories (SSD, FLASH, etc.); high-speed transceivers for protocols such as PCIe, SATA; and memory-mapped interfaces such as AXI, Wishbone, Avalon. Using advanced design methodologies like Hierarchical Design. Experience using lab equipment: high-speed oscilloscopes, logic and protocol analyzers, spectrum analyzers, etc. Experience with schematic design and board bring-up is a plus point. Would be great if you have A Bachelor’s Degree in EE, CS or CE (or a related field) with at least 2+ years of relevant experience or an Advanced Degree (Masters or PhD). Excellent knowledge of hardware description languages (Verilog/System Verilog/VHDL). Strong understanding of computer architecture and logic design, and serial interfaces – SPI, I2C, LVDS, etc. Solid understanding of timing principles, including clock domain crossing and timing closure. Experience with FPGA tools (e.g Vivado) and HDL Simulation Tools (ModelSim). Strong debugging and analytical skills. Strong communication skills and the ability to work in a small team are a huge plus. Solid programming skills (C / C++, Python, Matlab). Candidate Acumen: A strong desire to work in an unstructured, high-growth, fast-paced start-up environment> Benefits: Health insurance coverage Unlimited leaves & flexible working hours Role-based remote work and work-from-home benefit Relocation assistance Professional Mental Wellness services Creche facility for primary caregivers (limited to India) Employee Stock Options for all hires About Pixxel Pixxel is a space data company, building a constellation of hyperspectral earth imaging satellites and the analytical tools to mine insights from that data. Pixxel’s constellation is designed to provide global coverage every 24 hours and help detect, monitor, and predict global phenomena across agriculture, mining, environment and energy use cases. Pixxel is on a mission to build a health monitor for the planet through a constellation of cutting-edge hyperspectral small satellites. This unique hyperspectral capability will be the key to unearth underlying, unseen problems that are invisible to satellites in orbit today. Pixxel has collaborated with prominent organizations such as the Indian Space Research Organization, NASA JPL, and SpaceX among other leaders in the space industry. The organization is backed by Lightspeed, Radical Ventures, Relativity's Jordan Noone, Seraphim Capital, Ryan Johnson, Blume Ventures, Sparta LLC and Accenture among others. Recently, Pixxel successfully raised $36 Million in its Series B funding round, with participation from new investors like Google, alongside existing investors, bringing the company's total venture funding to $71 Million. To know more about us, visit https://www.pixxel.space. Link to Pixxel in Media Show more Show less

The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence - One Team culture promotes collaboration within and across teams to ensure customer success. Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests. You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other every day. Job Responsibilities & Skills: Need a person to create CXL and PCIe switches to complete our offering in the CXL and PCIe space. Should have good knowledge of C++ and HDL is required. Knowledge of the PCIe and/ or CXL protocol is required. Knowledge of Java may be given preference. Education and Experience: B. Tech /BE/M.Tech / ME with 6 to 10 years of relevant experience. Behavioral skills required. Must possess strong written, verbal and presentation skills. Ability to establish a close working relationship with both customer peers and management. Explore what s possible to get the job done, including creative use of unconventional solutions. Work effectively across functions and geographies. Push to raise the bar while always operating with integrity.

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL/Test Pervassive Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise -4+ years of relevant experience - At least 1 generation of processor L2 cache or LLC design delivery leadership. - Expertise in cache coherence protocols for symmetric multiprocessors (SMP), covering both chip SMP and multi-socket SMP. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. - Experience in logical and physical design of caches including directories (tags, set associative memories), data SRAM, design for low latency, multiple parallel finite state machine design, deadlock-free designs.

Job Track Description Performs business support or technical work, using data organizing and coordination skills. Performs tasks based on established procedures. In some areas, requires vocational training, certifications, licensures, or equivalent experience. General Profile Expands skills within an analytical or operational process. Maintains appropriate licenses, training, and certifications. Applies experience and skills to complete assigned work. Works within established procedures and practices. Establishes the appropriate approach for new assignments. Works with a limited degree of supervision. Functional Knowledge Has developed skillset in a range of processes, procedures, and systems. Business Expertise Helps teams to integrate and work together to support the achievement of company goals. Impact Impacts a team, by example, through the quality service and information provided. Uses discretion to modify work practices and processes to achieve results or improve efficiency. Leadership May provide informal guidance to junior team members. Problem Solving Ability to problem solve, self-guided. Evaluates issues and solutions to provide the best outcome for clients and end-users. Interpersonal Skills Clearly and effectively exchanges information and ideas. Responsibility Statements Creates a quality checklist to determine potential defects. Reviews transactions and selects samples for auditing. Performs risk assessments related to performance monitoring and financial operations. Understands the connectivity of up-stream and down-stream processes with respect to the process they are auditing. Validates audit findings with operations personnel to concur with root cause analysis (RCA). Performs other duties as assigned. Complies with all policies and standards. Conduent is an Equal Opportunity Employer and considers applicants for all positions without regard to race, color, creed, religion, ancestry, national origin, age, gender identity, gender expression, sex/gender, marital status, sexual orientation, physical or mental disability, medical condition, use of a guide dog or service animal, military/veteran status, citizenship status, basis of genetic information, or any other group protected by law. People with disabilities who need a reasonable accommodation to apply for or compete for employment with Conduent may request such accommodation(s) by submitting their request through this form that must be downloaded:click here to access or download the form. Complete the form and then email it as an attachment toFTADAAA@conduent.com.You may alsoclick here to access Conduent's ADAAA Accommodation Policy. At Conduent we value the health and safety of our associates, their families and our community. For US applicants while we DO NOT require vaccination for most of our jobs, we DO require that you provide us with your vaccination status, where legally permissible. Providing this information is a requirement of your employment at Conduent.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Principal Product Engineer Grade: T3 Experience: 7 - 10 Years Location: Noida Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. We offer amazing opportunities to grow, no matter where you are in your career. Experience And Technical Skills Required Understanding of HDL (Verilog, System Verilog, VHDL) and concept of logic synthesis. Hands on experience on Industry standard Synthesis tools. Good understanding of timing concepts and SDCs, Experience in PPA push and analysis. 1801/UPF concepts, awareness of P&R flows, Power analysis and optimization is a plus Qualifications BE/BTech/ME/MS/MTech or equivalent We’re doing work that matters. Help us solve what others can’t. Show more Show less

Introduction As a Hardware Engineer at IBM, you’ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today’s market. Your Role And Responsibilities Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Preferred Education Master's Degree Required Technical And Professional Expertise 1-3 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification : Chip reset sequence and initialization, and/or Power management. Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good programming skills in C/C++, Python/Perl Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Hardware debug skills backed by relevant experience on projects Exposure in developing testbench environment, write complex test scenarios Good communication skills and be able to work effectively in a global team environment Drive verification coverage closure Preferred Technical And Professional Experience Knowledge of Chip-Initialisation , SCAN , BIST is a plus Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug Show more Show less

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow’s idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Looking for Siemens EDA ambassadors We are passionate about innovations that mean real progress, and we are curious about technologies that still need to be developed. Do you want to use curiosity, passion, and creativity to make the lives of millions of people easier and better? Join us – whichever path you take, we’re looking forward to seeing your point of view! This is your Role! We are looking for a highly motivated Senior and Lead Member Technical Staff engineers to work in the Calypto Design Systems Division. You will be part of a high-performing PowerPro R&D software team responsible for designing, developing, and debugging software programs for the industry standard Power Optimization and Formal Verification tool development team at Siemens EDA. Team up with a senior group of software engineers and give to final production level quality of new software features, components, and algorithms and to support existing software components. We are not looking for superheroes, just super minds We seek a Graduate / Post Graduate (Bachelors/Masters) in EEE) / ECE/Computer Science (CS) from top reputed Engineering colleges with 5-8 years of significant experience in software development. Experience in EDA will be a plus! We value a sound understanding of C/C++ languages, design patterns along with data structure and algorithms will be key to development of software. We appreciate an understanding of HDL languages – Verilog/VHDL/System Verilog s needed. Knowledge of scripting languages, hands-on knowledge of Revision control systems like Perforce will only improve the development time. Good analytical, abstraction and communication skills helps in creating bigger and balanced solutions for complex systems. Ability to work with multi-functional teams as a teammate will help in creating good solutions that resolve actual customer issues. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Show more Show less

Deliver comprehensive training on VLSI Design and Verification, covering topics like Digital Design, Verilog/System Verilog, RTL Design, and UVM. Prepare, update, and structure course materials and assignments as per industry standards.

Sr, Staff ASIC Verification Engineer, Noida Location: Key responsibilities: Identify verification environment requirements from its various sources (Specifications, Design functionality, Interfaces, etc …) Generate verification test plan, verification environment documentation and test environment usage documentation Define, develop, and verify complex UVM verification environments Evaluates and exercises various aspects of the development flow. May include such items as Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modelling, and verification coverage metrics (functional coverage and code coverage) Collaborate with architect, designers , VIP team to accomplish tasks. Identify design problems, possible corrective actions and/or inconsistencies on documented functionality Work with peers to improve methodologies and improve execution efficiency. Adhere to quality standards and good test and verification practices. Work as a lead, mentor junior engineers, and help them in debugging complex problems. Able to Support Customer issues, by their reproduction and analysis. Should be able multitask between different activities. Key Qualifications Proven desire to learn and explore new state of the art technologies Demonstrate good written and spoken English communication skills Demonstrate good review and problem-solving skills Knowledgeable with Verilog, VHDL and/or SystemVerilog Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus Understanding of verification methodology such as UVM . Good organization and communication skills Be a solution provider. 8+ years of relevant experience Show more Show less

Staff ASIC Verification Engineer, Noida Location: Key responsibilities: Participate in development of verification test plan, verification environment documentation and test environment usage documentation Evaluates and exercises various aspects of the development flow. May include such items as Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modelling, and verification coverage metrics (functional coverage and code coverage) Collaborate with architect, designers , VIP team and peers to accomplish all verification goals. Identify design problems, possible corrective actions and/or inconsistencies on documented functionality Adhere to quality standards and good test and verification practices. May work to coach junior engineers and help them in debugging complex problems. Key Qualifications Proven desire to learn and explore new state of the art technologies Demonstrate good written and spoken English communication skills Demonstrate good review and problem-solving skills Knowledgeable with Verilog, VHDL and/or SystemVerilog Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus Understanding of verification methodology such as UVM . Good organization and communication skills. 5 + years of relevant experience Show more Show less

We are seeking a highly skilled Design Verification Engineer (DV) with 10+ yrs experience to join our growing team and play a vital role in ensuring the quality and functionality of our advanced ASICs and SoCs. This position requires a strong foundation in verification methodologies and the ability to handle complex verification tasks. You will be instrumental in developing robust verification plans and environments to guarantee the success of our next-generation integrated circuits. Responsibilities: Develop and implement comprehensive verification plans utilizing industry-leading methodologies (UVM, Formal Verification) Design and create high-quality verification environments (testbenches) to achieve exceptional code coverage Utilize advanced verification tools (simulators, formal verification tools) to thoroughly verify RTL functionality Debug and analyze verification failures with a keen eye to identify and resolve the root cause of design issues Collaborate effectively with RTL design engineers to ensure efficient bug resolution and verification plan adherence Lead and mentor junior DV engineers within the team, fostering a collaborative and knowledge-sharing environment Participate in code reviews and champion best practices for verification code quality Stay current with the latest advancements in verification tools and methodologies Qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus) 7-10 years of solid experience in Design Verification for ASICs or SoCs In-depth knowledge of digital design principles (combinational logic, sequential logic, finite state machines) Proven ability to develop, debug, and optimize complex verification environments Expertise in Verilog or VHDL with a strong understanding of verification methodologies (UVM, Formal) Extensive experience with simulation tools (ModelSim, Cadence Incisive, Synopsys VCS) and scripting languages (Python, Perl) Experience with formal verification tools and techniques is a plus Excellent analytical and problem-solving skills with a meticulous attention to detail Strong communication, collaboration, and leadership skills to effectively contribute and guide the team Show more Show less

Summary Established in 2001, EnSilica is a publicly listed company (LON:ENSI), designing industry leading, application specific integrated circuit chips (ASIC), for customers ranging from start-ups to blue chip companies, in industries including: automotive, medical, space and mobile technology companies. With its head office on Milton Park, Oxfordshire, and other offices in Bristol, Sheffield, Brazil (Porto Alegre) and India (Bangalore), EnSilica currently employs more than 160 people. We are looking for a very experienced verification engineer who can not only strengthen the team through their technical expertise but also bring leadership and grow the verification business within EnSilica. You will have a good understanding of different methodologies, but particularly SystemVerilog and UVM. Faced with a new project, you will have the ability to quickly assimilate the verification challenge and help define an effective and pragmatic verification strategy and gain the support of the end-customer for the chosen approach. You will need to understand the importance of monitoring key metrics to assess progress and predict the end-point for the verification process. Responsibilities Verification specialist working on customer and internal projects often as the verification lead. Provide high-class verification support to a wide range of projects using a range of advanced verification techniques including constrained random, coverage driven, assertion-based and formal methods. You would also be responsible for the development of a comprehensive verification strategy and plan, along with the architecting and development of the complete test environment. Active participation in the verification community to drive the introduction of new and effective techniques within our business to help solve the verification challenges faced by our customers. Close working with our customers to build a strong relationship that results in repeat business. Education / Key Skills / Experience BE/ME in Electronics /Computer Science 1 group University. 15+ years experience in industry working on a variety of verification projects. Extensive knowledge of verification methodologies particularly UVM and SystemVerilog. Strong experience in the specification and implementation of verification infrastructures, test benches, models, assertions and functional tests in Verilog and SystemVerilog. Familiarity with constrained random verification methodologies, code coverage analysis and running regression tests. Strong VHDL/Verilog RTL. Very good understanding of modern verification flows and methodologies and able to influence the EnSilica one toward continuous improvement Ideally you will be familiar with both Mentor Questa and Cadence Incisive tool and ideally some exposure to low power verification using UPF based flows A good understanding of functional safety and quality processes, to achieve ISO26262 or similar standards compliances will be considered as a strong plus Personality Excellent communication and interpersonal skills. Strong and effective presentation skills, able to operate at multiple levels including senior management. Self-motivated achiever who gains satisfaction from providing excellent customer service and has a can-do attitude. Happy to take ownership of problems and provide suitable solutions. Creative problem solving. Team player. Ability to work in a dynamic environment.

This position is with ASIC design physical implementation (PD) team part of Central Engineering business unit at Marvell, Bangalore. This team as part of global Implementation team plays a key role in Netlist to GDS implementation, covering Synthesis, P&R, Timing, PV and Power implementation all custom ASICs for all the OEM s. We are looking for individuals with the domain of physical design having Block /Subsystem level implementation experience on hierarchical designs using industry standard tools. What You Can Expect Work with a global team on the physical design of complex chips at Block/Partition/Full-Chip level. You will also play a critical role in refining the methodology to enable an efficient and robust design process working closely with the methodology team. Your tasks will include performing synthesis, place and route, as well as timing analysis and closure on a given hierarchical design at block/partition/full-chip level. You will play a crucial role in developing and implementing timing and logic ECOs, collaborating closely with the RTL design team to drive modifications that address congestion and timing issues. Collaboration with the frontend team will be crucial to ensure successful tapeouts. Additionally, your involvement with the global timing team will include debugging and resolving any block/partition level timing issues encountered at the Chip level. This position provides an exciting platform to engage with diverse engineering challenges within a collaborative and innovative environment at Marvell. What Were Looking For Have completed a Bachelor s OR a Masters Degree in Electronics/Electrical/VLSI field and have atleast 15+ years of related professional experience in physical design at Partition/Subsystem/Chip level with a proven track record of successful tape-outs. In your coursework, you must have completed a course in digital electronics, CMOS design and projects that involved circuit design & analysis. Good understanding of standard RTL to GDS flows and methodology, experience in designing ICs at advanced technology nodes (e. g. , 7nm, 5nm, or below) is highly desirable. Working knowledge on any of the scripting in languages such as Perl, tcl, AWK and Python. Knowledge of Verilog/VHDL basics is an added advantage. Good communication skills and self-discipline contributing in a team environment. In-depth knowledge and hands-on experience with industry-standard physical design tools and methodologies, including synthesis, floor planning, placement, clock tree synthesis, routing, and physical verification.

Alphawave Semi is looking for Senior Engineer I - ASIC Design to join our dynamic team and embark on a rewarding career journey. Analyze and assess problems. Apply quality principles and methodology in processes to enhance output. Assess new product designs to meet project and product requirements. Create engineering designs. Identify the design needs of clients. Manage disputes and conflicts. Manage product design and development to meet project and product requirements. Oversee Workplace Safety and Health Systems (WSH) for the company.

Position: Application Engineer, Embedded Software Job Description: Key Responsibilities: Provide advanced engineering design service and support to regional engineering team on embedded hardware including processors, FPGA and software design support. Collaborate with customers to develop, test, and debug firmware, assist with code creation, driver development on MCUs based on ARM Cortex, RISC-V, and proprietary cores. Assist customers to configure and customize embedded Linux systems, including kernel configuration, device drivers, middleware integration, and real-time patches. Design technical demonstrations, including Proof of Concepts (PoC), showcasing microcontroller/microprocessor, FPGA capabilities in real-world applications. Create high-quality documentation, including technical guides, application notes, and training materials, for internal and external use. Share technical expertise by delivering training sessions and workshops for internal engineers and customers. Attend technical and sales training in efforts to stay abreast of current technology. Develop product performance specifications and product development roadmaps Ensure accurate documentation of engineering designs and solutions for future reference. Qualifications & Requirements: Bachelor s Degree or higher in Electronics/Electrical Engineering, Computer Science, or a related engineering field. Minimum 7 years of experience in electronics, semiconductors, embedded processors, and FPGA design. Proven experience in firmware development across multiple microcontroller platforms based on ARM Cortex, RISC-V, and proprietary cores. Advanced proficiency in C/C++ for embedded systems; familiarity with Python. Experience with kernel debugging, device tree customization, and interfacing hardware peripherals through custom drivers. Proficiency in VHDL and Verilog; knowledge of System Verilog or High-Level Synthesis (HLS) is a plus. Hands-on experience deploying machine learning models on MPUs using tools like TensorFlow Lite, OpenCV, or ONNX Runtime. Excellent problem-solving skills and a proactive approach to technical challenges. Strong communication and teamwork skills to work effectively with customers and internal teams. Passion for innovation and commitment to delivering high-quality engineering solutions. Location: IN-KA-Bangalore, India Time Type: Full time Job Category: Engineering and Technology

Position: Application Engineer, Embedded Software Job Description: Key Responsibilities: Provide advanced engineering design service and support to regional engineering team on embedded hardware including processors, FPGA and software design support. Collaborate with customers to develop, test, and debug firmware, assist with code creation, driver development on MCUs based on ARM Cortex, RISC-V, and proprietary cores. Assist customers to configure and customize embedded Linux systems, including kernel configuration, device drivers, middleware integration, and real-time patches. Design technical demonstrations, including Proof of Concepts (PoC), showcasing microcontroller/microprocessor, FPGA capabilities in real-world applications. Create high-quality documentation, including technical guides, application notes, and training materials, for internal and external use. Share technical expertise by delivering training sessions and workshops for internal engineers and customers. Attend technical and sales training in efforts to stay abreast of current technology. Develop product performance specifications and product development roadmaps Ensure accurate documentation of engineering designs and solutions for future reference. Qualifications & Requirements: Bachelor s Degree or higher in Electronics/Electrical Engineering, Computer Science, or a related engineering field. Minimum 7 years of experience in electronics, semiconductors, embedded processors, and FPGA design. Proven experience in firmware development across multiple microcontroller platforms based on ARM Cortex, RISC-V, and proprietary cores. Advanced proficiency in C/C++ for embedded systems; familiarity with Python. Experience with kernel debugging, device tree customization, and interfacing hardware peripherals through custom drivers. Proficiency in VHDL and Verilog; knowledge of System Verilog or High-Level Synthesis (HLS) is a plus. Hands-on experience deploying machine learning models on MPUs using tools like TensorFlow Lite, OpenCV, or ONNX Runtime. Excellent problem-solving skills and a proactive approach to technical challenges. Strong communication and teamwork skills to work effectively with customers and internal teams. Passion for innovation and commitment to delivering high-quality engineering solutions. Location: IN-KA-Bangalore, India Time Type: Full time Job Category: Engineering and Technology

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. GCS AE Job Description Document Job Title: Lead Application Engineer - GCS Location: Bangalore / Noida Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture builds and fosters diversity, equity and inclusion to maximize our ability to innovate, drive growth, and win with our customers. Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. Job Summary As a member of the GCS Organization for the MSA (Multiphysics System Analysis), you will partner with world-wide Cadence customers to provide post sales technical consultation for IC level Power System analysis products for implementing cutting-edge designs. This involves working closely with the customers to understand and debug complex issues enabling them to proceed further with design cycle phases, help them leverage the latest tool capabilities, and guide them with implementation of software in their design methodologies. You will have an opportunity to acquire both breadth and depth of technical knowledge, get wide exposure to the latest design practices in industry and demonstrate expertise by authoring high impact knowledge content. This role also provides opportunity to participate in the evolution of key technology solutions to the most pressing design problems. In this role, you will have the opportunity to work with product teams to identify and prioritize the product improvement initiatives with your timely feedback and observations. This an excellent opportunity to work in a supportive, flexible and friendly work environment that GCS offers, where we are vested in each other’s success, and are passionate about technology and innovation. Job Responsibilities Provide technical support for Voltus product from the Multiphysics System Analysis (MSA) toolset of Cadence products with focus on productivity, and customer satisfaction Support multiple tools/methods for customer requiring general domain knowledge and developing business experience Assist in creation of high quality and impactful knowledge content in MSA domain Work independently at Cadence or customer facilities to deliver quality results according to schedule requirements Work on problems of moderate scope that may require analysis of situations, data or tool problems Qualifications Bachelor’s Degree in; Electrical / Electronics / Electronics and Communication / VLSI Engineering with 5-7 years related experience OR Masters with 3-4 years of related experience OR PhD with 1 years of related experience Experience And Technical Skills Required 3-7 years relevant industry experience in EMIR analysis, PDN analysis with digital signoff tools and Digital Physical implementation as designer or methodology/flow expert Strong background in Digital logic Design, CMOS logic Design, Power IR drop analysis, Circuit Design and Analysis, Digital and Behavioral simulation fundamentals related to IC and Package Design Debugging of Low power and multiple power domain analysis for chip power integrity sign-off. Understanding of Digital design toolsets of Cadence (Genus/Innovus/Tempus/Conformal); knowledgeable of at least 50% of a given flow; detailed knowledge in one CDN tool, learning others; ability to analyze customer's environment and evaluate appropriate support solutions; learning competitive tools/technologies Must have excellent debugging skills and ability to separate out the critical issues from trivial ones. Ability to solve interface level problems emanating from IC Implementation side and System analysis side. Ability to debug Timing and thermal issues in relation to IR and EM is a plus Good understanding of Hardware description languages like VHDL, Verilog, System Verilog. Knowledge on TCL, Perl or Python scripting. Behavioral Skills Required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore what’s possible to get the job done, including creative use of unconventional solutions Work effectively across functions and geographies Push to raise the bar while always operating with integrity We’re doing work that matters. Help us solve what others can’t. Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Understand/review Design specification and develop verification strategy/Test plan/coverage plan. Development of constrained random verification environments and verification components. Writing tests/sequences/functional coverage/assertions to meet verification goals. Developing c-based test cases for SOC verification. Required Experience Strong background on functional verification fundamentals, environment planning, test plan generation, environment development System Verilog experience and experience with UVM based functional verification environment development is required. Good knowledge of verilog/vhdl/C/C++/Perl/Python. Expertise in AMBA protocols. (AXI/AHB/APB). Good knowledge of at least one of the USB/PCIE/Ethernet/DDR/LPDDR or similar protocols Good handle on using one or more version control software Good handle on using one or more load sharing software Desirable Skills And Experience Prior experience with Cadence tools and flows is highly desirable. Familiarity with ARM/CPU architectures is a plus. Experience in developing c-based test cases for SOC verification Some experience with assembly language programming Good knowledge of some of the protocols like UART, I2C, SPI, JTAG Embedded C code development and debug Formal Verification experience Strong vocabulary, communication, organizational, planning, and presentation skills are essential. Ability to work independently and productively with high quality output and results in a fast paced and dynamic environment. Ability and desire to learn new methodologies, languages, protocols etc. Must be open to constant personal development and growth to meet the evolving demands of the semiconductor industry. Self-motivated and willing take up additional responsibilities to contribute to team’s success. We’re doing work that matters. Help us solve what others can’t. Show more Show less

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-6years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification Chip reset sequence and initialization, and/or Power management. Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good programming skills in C/C++, Python/Perl Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Hardware debug skills backed by relevant experience on projects Exposure in developing testbench environment, write complex test scenarios Good communication skills and be able to work effectively in a global team environment Drive verification coverage closure Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , BIST is a plus Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

Role & responsibilities: Extensive hands on and teaching experience on Digital / SV /UVM/ Verilog / VHDL /DFT tools Extensive experience in Back-end design Experience on Mentor Graphics EDA flow is an added advantage Responsible for development and support of Projects. Responsible for Debugging the source codes in Verilog, SV, and UVM. Responsible for Training Delivery and Support Preferred candidate profile Sound Knowledge on Digital / Verilog / VHDL / SV / UVM / DFT / Back-end design 3 to 8 years industry/teaching experience Good communication & presentation skill

About Marvell . Your Team, Your Impact This position is with ASIC design physical implementation (PD) team part of Central Engineering business unit at Marvell, Bangalore. This team as part of global Implementation team plays a key role in Netlist to GDS implementation, covering Synthesis, P&R, Timing, PV and Power implementation all custom ASICs for all the OEM s. We are looking for individuals with the domain of physical design having Block /Subsystem level implementation experience on hierarchical designs using industry standard tools. What You Can Expect Work with a global team on the physical design of complex chips at Block/Partition/Full-Chip level. You will also play a critical role in refining the methodology to enable an efficient and robust design process working closely with the methodology team. Your tasks will include performing synthesis, place and route, as well as timing analysis and closure on a given hierarchical design at block/partition/full-chip level. You will play a crucial role in developing and implementing timing and logic ECOs, collaborating closely with the RTL design team to drive modifications that address congestion and timing issues. Collaboration with the frontend team will be crucial to ensure successful tapeouts. Additionally, your involvement with the global timing team will include debugging and resolving any block/partition level timing issues encountered at the Chip level. This position provides an exciting platform to engage with diverse engineering challenges within a collaborative and innovative environment at Marvell. What Were Looking For Have completed a Bachelor s OR a Masters Degree in Electronics/Electrical/VLSI field and have atleast 10+ years of related professional experience in physical design at Partition/Subsystem/Chip level with a proven track record of successful tape-outs. In your coursework, you must have completed a course in digital electronics, CMOS design and projects that involved circuit design & analysis. Good understanding of standard RTL to GDS flows and methodology, experience in designing ICs at advanced technology nodes (e. g. , 7nm, 5nm, or below) is highly desirable. Working knowledge on any of the scripting in languages such as Perl, tcl, AWK and Python. Knowledge of Verilog/VHDL basics is an added advantage. Good communication skills and self-discipline contributing in a team environment. In-depth knowledge and hands-on experience with industry-standard physical design tools and methodologies, including synthesis, floor planning, placement, clock tree synthesis, routing, and physical verification. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-KP1

The engineer should be well versed in Verilog/VHDL RTL coding, experienced in using Mentor DfT tools and Cadence tools. The engineer needs to have hands-on experience in scan insertion, JTAG, ATPG DRC and coverage analysis, Simulation debug with timing/SDF. Candidate with LBIST and Mixed Signal Radar IC experience is highly desirable Must be proactive, collaborative and detail-oriented capable of exercising independent judgment The engineer with experience on debug and root cause the problem in simulation failures Self-motivation, flexibility, with strong interpersonal skills. Effective communication skills, oral and written skills.

Looking for Siemens EDA ambassadors We are passionate about innovations that mean real progress, and we are curious about technologies that still need to be developed. Do you want to use curiosity, passion, and creativity to make the lives of millions of people easier and better? Join us – whichever path you take, we’re looking forward to seeing your point of view! We are not looking for superheroes, just super minds We seek a Graduate / Post Graduate (Bachelors/Masters) in EEE) / ECE/Computer Science (CS) from top reputed Engineering colleges with 4-8 years of significant experience in software development. Experience in EDA will be a plus! Proficiency in C/C++ languages, design patterns along with data structure and algorithms will be key to development of software. Your understanding of HDL languages – Verilog/VHDL/System Verilog is essential. We value your knowledge of scripting languages, hands-on knowledge of Revision control systems like Perforce will only improve the development time. Good analytical, abstraction and interpersonal skills will help in creating bigger and sustainable solutions for complex systems. Ability to work with multi-functional teams as a great teammate will help in creating good solutions that resolve actual customer issues. Soft Skills: Excellent verbal and written communication skills. Self-starter, motivated and strong teammate. Team Contributor, Quick learner. Hard working, sincere and committed to work. Teammate and good management skills We've got a lot to offer, how about you? We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, and private healthcare. Transform everyday Show more Show less